KR19990004772A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

Disclosed is a method of manufacturing a thin film type optical path control device. The method provides an active matrix including a drain pad in which M × N transistors are embedded and formed on one side. One side contacts the upper portion of the active matrix and the other side forms a support layer in parallel with the active matrix through the air gap. An etch stop layer is formed on the support layer and then patterned to leave the etch stop layer only in the Iso­Cut region to be formed in a subsequent process. After the lower electrode is formed on the etch stop layer and the support layer, a portion where the etch stop layer is formed below the lower electrode is Iso­Cut. An actuator is formed by forming a strained layer on the lower electrode and an upper electrode on the strained layer. When the etching process for patterning each of the strained layer, the lower electrode, and the support layer into a predetermined pixel shape is performed, since the Iso­Cut region is protected by the etch stop layer, damage to the Iso­Cut region can be minimized.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method of manufacturing a thin film type optical path control apparatus using an Actuated Mirror Array (AMA). More specifically, the IsoCut region is damaged when etching processes for patterning the deformed layer, the lower electrode, and the support layer into pixel shapes are performed. It relates to a method for manufacturing a thin film type optical path control device that can be prevented (attack).

Spatial light modulators, which are devices for projecting optical energy onto a screen, can be applied to various fields such as optical communication, image processing, and information display devices. The image processing apparatus using the optical path adjusting device or the spatial light modulator typically has a direct-view image display device and a projection-type image device according to a method of displaying optical energy on a screen. display device).

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display devices include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2% and requires dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (10% or more) can be obtained compared to LCD or DMD. In addition, contrast can be improved to obtain a bright and clear image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric image signal and the bias voltage. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect the incident light at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ), or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. The actuator can also be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by a sawing method and installing a mirror thereon. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the deformation layer is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in the patent application No. 96-42197 (name of the invention: a method of manufacturing a thin film type optical path control device that can control the stress of the membrane) that the applicant filed a patent with the Korean Patent Office on September 24, 1996 It is.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the above prior application.

Referring to FIG. 1, the thin film type optical path adjusting device includes an active matrix 1 and an actuator 60. An active matrix 1 having M × N (M, N is an integer) MOS transistors and a drain pad 5 formed on one side thereof includes the active matrix 1 and A passivation layer 10 stacked on top of the drain pad 5 and an etch stop layer 15 stacked on top of the passivation layer 10 are included.

The actuator 60 is a membrane in which one side is in contact with a portion of the etch stop layer 15 in which the drain pad 5 is formed and the other side is parallel to the active matrix 1 via the air gap 25. 30, a lower electrode 35 stacked on the membrane 30, a strained layer 40 stacked on the lower electrode 35, and an upper electrode stacked on the strained layer 40. 45, a via hole vertically formed from one side of the strained layer 40 to the drain pad 5 through the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. The lower electrode 35 and the drain pad 5 are formed in the via contact 55 to be electrically connected to each other.

A stripe 46 is formed on a portion of the upper electrode 45. The stripe 46 operates the upper electrode 45 uniformly to prevent diffuse reflection of light incident from the light source.

Hereinafter, a method of manufacturing the thin film type optical path control device will be described with reference to FIGS. 2A to 2D.

Referring to FIG. 2A, a phosphorus-silicate glass (phosphor—) is formed on an active matrix 1 having M × N (M and N are integers) transistors (not shown) and a drain pad 5 formed on one side thereof. A protective layer 10 made of silicate glass (PSG) is formed. The protective layer 10 is formed to have a thickness of about 1.0 μm using chemical vapor deposition (CVD). The protective layer 10 protects the active matrix 1 from subsequent processes.

An etch stop layer 15 made of nitride is formed on the protective layer 10. The etch stop layer 15 may be formed to have a thickness of about 0.1 μm to about 1.0 μm using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the protective layer 10 and the active matrix 1 from being etched during the subsequent etching process.

The sacrificial layer 20 is formed on the etch stop layer 15. The sacrificial layer 20 is formed of a PSG having a high concentration of phosphorus (P) to have a thickness of about 1.0 μm to 3.0 μm by using an atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 20 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 20 is planarized by using spin-on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 20 in which the drain pad 5 is formed is etched to expose a portion of the etch stop layer 15 to form a position where the support portion of the actuator is to be formed.

Referring to FIG. 2B, the membrane 30 is formed on the exposed etch stop layer 15 and the sacrificial layer 20 to a thickness of about 0.1 μm to about 1.0 μm. The membrane 30 forms nitride using low pressure chemical vapor deposition (LPCVD). At this time, by forming the membrane 30 while varying the ratio of the reaction gas in the reaction vessel of low pressure, the stress in the membrane 30 is controlled.

On the membrane 30, for example, a lower electrode 35 made of platinum (Pt) -tantalum (Ta) is formed. Subsequently, the lower electrode 35 is etched to short the lower electrode 35 for each pixel so that an independent first signal (image signal) is applied to each pixel (Iso 화소 Cut etching process).

The deformation layer 40 formed of PZT or PLZT is formed on the lower electrode 35. The strained layer 40 is formed to have a thickness of about 0.1 μm to about 1.0 μm, preferably about 0.4 μm using a sol-gel method, and then a phase change is performed by a rapid thermal annealing (RTA) method. Makes it. The deformation layer 40 is deformed by an electric field generated between the upper electrode 45 that is a common electrode and the lower electrode 35 that is a signal electrode.

The upper electrode 45 is formed on the strained layer 40. The upper electrode 45 is formed of a metal having excellent electrical conductivity and reflectivity such as aluminum or platinum so as to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The second signal (bias signal) is applied to the upper electrode 45 which is the common electrode. In addition, the upper electrode 45 also functions as a mirror that reflects light incident from the light source.

Referring to FIG. 2C, the upper electrode 45 is patterned into a predetermined pixel shape. In this case, the stripe 46 is patterned so that the stripe 46 is formed on one side of the upper electrode 45. Subsequently, the strained layer 40 and the lower electrode 35 are sequentially patterned into a predetermined pixel shape, and then the strained layer 40 is formed from an upper portion of one side of the strained layer 40 to an upper portion of the drain pad 5. The via hole 50 is formed by sequentially etching the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. Subsequently, a metal such as tungsten, platinum or titanium is deposited by a lift-off method to form a via contact 55 that electrically connects the drain pad 5 and the lower electrode 35. Therefore, the via contact 55 is formed vertically from the lower electrode 35 to the top of the drain pad 5 in the via hole 50. Therefore, the first signal applied from the outside is applied to the lower electrode 35 through the transistor, the drain pad 5, and the via contact 55 embedded in the active matrix 1.

Referring to FIG. 2D, a photoresist layer (not shown) is coated on the entire surface of the resultant product in which the via contact 55 is formed and patterned to expose the membrane 30. Subsequently, the membrane 30 is anisotropically etched using the photoresist layer as an etching mask, thereby patterning a predetermined pixel shape. Subsequently, the air gap 25 is formed by isotropically etching the sacrificial layer 20 by 49% hydrogen fluoride (HF) vapor using the photoresist layer as an etching mask. Subsequently, the AMA device is completed by removing the photoresist layer and performing a cleaning and drying process to remove the remaining etching solution.

In the above-described thin film type optical path adjusting device, the first signal is applied to the lower electrode 35 which is a signal electrode through the MOS transistor, the drain pad 5 and the via contact 55 embedded in the active matrix 1. In addition, a second signal is applied to the upper electrode 45 through a common electrode line (not shown) from the outside to generate an electric field between the upper electrode 45 and the lower electrode 35. Due to this electric field, the strained layer 40 stacked between the upper electrode 45 and the lower electrode 35 causes deformation. The strained layer 40 contracts in a direction perpendicular to the electric field, and the actuator 60 including the strained layer 40 is bent upward at a predetermined angle. Therefore, the upper electrode 45 on the actuator 60 is also inclined in the same direction. Light incident from the light source is reflected by the upper electrode 45 at a predetermined angle, and then is projected onto the screen to form an image.

However, in the above-described thin film type optical path control device, the Iso­Cut region is continuously damaged when etching processes for patterning the strained layer, the lower electrode, and the membrane into a predetermined pixel shape, respectively. This will be described in more detail with reference to the drawings.

3 is a plan view illustrating an Iso ­ Cut portion in the above-described thin film type optical path adjusting device.

Referring to FIG. 3, the IsoCut region (see A) is not covered with photoresist when etching processes for patterning the strained layer 40, the lower electrode 35, and the membrane 30 into predetermined pixel shapes, respectively. Exposed Therefore, the membrane 30 of the Iso­Cut region A is continuously damaged while the etching processes are performed. As a result, during subsequent etching of the sacrificial layer using hydrogen fluoride (HF) vapor, hydrogen fluoride vapor penetrates through the damaged portion of the membrane 30 to affect the MOS transistor embedded in the active matrix. The device will not work or will malfunction.

Accordingly, an object of the present invention is to provide a method of manufacturing a thin film type optical path control apparatus capable of preventing damage to the Iso­Cut region when etching processes for patterning the strained layer, the lower electrode, and the support layer into pixel shapes, respectively.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2D are cross-sectional views illustrating a method of manufacturing the apparatus shown in FIG. 1.

FIG. 3 is a plan view illustrating an IsoutCut portion of the apparatus of FIG. 1. FIG.

4 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. 4 taken along line B′B ′.

6A to 6E are cross-sectional views illustrating a method of manufacturing the device shown in FIG. 5.

Explanation of symbols for the main parts of the drawings

100: active matrix 105: drain pad

110: protective layer 115: etch stop layer

120: sacrificial layer 125: support layer

130: lower electrode 135: strained layer

140: upper electrode 145: via hole

150: via contact 155: etch stop layer

160: air gap 200: actuator

In order to achieve the above object of the present invention, providing an active matrix including a drain pad is formed on one side of the M × N (M, N is an integer) is built-in; And (i) forming a support layer in parallel with the active matrix on one side of the active matrix, the other side of which is in contact with the top of the active matrix, and through the air gap, ii) forming an etch stop layer on the support layer. After forming, patterning it to leave the etch stop layer only in the IsoCut site to be formed in a subsequent process, iii) after forming a lower electrode on top of the etch stop layer and the support layer, the etch stop layer below the lower electrode IsoCut the formed portion, i) forming a strained layer on top of the lower electrode, and v) forming an actuator on top of the strained layer. Provided is a method of manufacturing a regulating device.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, a material having an etch rate different from the material constituting the lower electrode on the support layer and having a similar etch rate to the material constituting the support layer is deposited. After the formation of the etch stop layer, the etch stop layer is left only on the portion to be IsoCut in a subsequent process through a photolithography process, and the remaining portions are removed. Accordingly, when the etching process for patterning the strained layer, the lower electrode, and the support layer into a predetermined pixel shape is performed, the Iso­Cut region is protected by the etch stop layer, thereby minimizing damage to the Iso­Cut region.

Therefore, the hydrogen fluoride vapor is prevented from penetrating through the IsoCut site during the etching process of the sacrificial layer using the hydrogen fluoride (HF) vapor, it is possible to prevent the failure of the device (yield) Can improve.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

4 is a plan view of a thin film type optical path adjusting device according to the present invention, and FIG. 5 is a cross-sectional view taken along line B′B ′ of the device of FIG. 4.

4 and 5, the thin film type optical path control apparatus includes an active matrix 100 and an actuator 200 formed on the active matrix 100.

An active matrix 100 having M × N (M, N is an integer) MOS transistors and a drain pad 105 formed on one side thereof has an upper portion of the active matrix 100 and the drain pad 105. The protective layer 110 is stacked on the protective layer 110, and the anti-etching layer 115 stacked on top of the protective layer 110.

The actuator 200 may have a cross section formed in parallel with the etch stop layer 115 through one side of the etch stop layer 115, the one side of which is in contact with a portion where the drain pad 105 is formed, and the other side through the air gap 160. Support layer 125 having a lower electrode 130 formed on top of support layer 125, a strained layer 135 formed on upper portion of lower electrode 130, an upper electrode 140 formed on upper portion of strained layer 135, And from one side of the strained layer 135 to the drain pad 105 vertically through the strained layer 135, the lower electrode 130, the support layer 125, the etch stop layer 115, and the protective layer 110. And a via contact 150 formed in the formed via hole 145.

In addition, referring to FIG. 4, one side of the plane of the support layer 125 has a concave portion having a rectangular shape at the center thereof, and the concave portion is formed in a shape that is stepped toward both edges. The other side of the plane of the support layer 125 has a rectangular protrusion that narrows stepwise toward the central portion corresponding to the concave portion. Therefore, the protruding portion of the support layer of the actuator adjacent to the concave portion of the support layer 125 is fitted, and the rectangular projection is fitted into the concave portion of the support layer of the adjacent actuator. The support layer 125 performs the function of the membrane 30 supporting the actuator of the thin film type optical path adjusting device described in the previous application.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

6A to 6E are cross-sectional views for explaining the method for manufacturing the device shown in FIG. 5. 6A to 6E, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 6A, a protective layer 110 is formed on an active matrix 100 having M × N (M and N are integers) MOS transistors (not shown) and a drain pad 105 formed on one side thereof. To form. The active matrix 100 is made of a semiconductor such as silicon or an insulating material such as glass or alumina (Al ₂ O ₃ ). The protective layer 110 may be formed to have a thickness of about 0.1 μm to about 1.0 μm by using a chemical vapor deposition (CVD) method. The protective layer 110 prevents damage to the transistor embedded in the active matrix 100 from subsequent processing.

Subsequently, an etch stop layer 115 is formed on the protective layer 110. The etch stop layer 115 is formed to have a thickness of about 0.1 μm to about 1.0 μm using low pressure chemical vapor deposition (LPCVD). The etch stop layer 115 prevents the protective layer 110 and the active matrix 100 having the transistor embedded therein from being etched during the subsequent etching process.

Subsequently, the sacrificial layer 120 is formed on the etch stop layer 115. The sacrificial layer 120 is formed by depositing PSG having a high concentration of phosphorus (P) to a thickness of about 2.0 to 3.2 μm using an atmospheric chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 120 covers the upper portion of the active matrix 100 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 120 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 120 having the drain pad 105 formed thereon is etched to expose a portion of the etch stop layer 115 to form a position at which the support of the actuator is to be formed.

Referring to FIG. 6B, the support layer 125 is formed on the exposed etch stop layer 115 and on the sacrificial layer 120. The support layer 125 is formed to have a thickness of about 0.1 to 1.0 탆 using a low pressure chemical vapor deposition (LPCVD) method.

Subsequently, nitride is deposited on the support layer 125 by plasma-enhanced chemical vapor deposition (PECVD) to form an etch stop layer 155.

Referring to FIG. 6C, the etch stop layer 155 is removed from only the portions to be Iso­Cut in a subsequent process through a photolithography process, and all etch stop layers 155 are removed. Subsequently, a lower electrode 130 is formed on the etch stop layer 155 and the support layer 125. The lower electrode 130 is formed to have a thickness of about 0.01 to 1.0 μm by sputtering a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta). Subsequently, the lower electrode 130 is separated for each pixel, so that the first signal is applied to each pixel so that the first electrode is cut. The Iso­Cut is formed at a portion where the etch stop layer is formed below the lower electrode, and is narrower than the etch stop layer. In this case, since the etch stop layer 155 made of a material (PECVD-nitride) having an etch selectivity is formed in the IsoCut portion, the material forming the lower electrode 130 is later formed. While the electrode 130 is etched, the support layer 125 of the IsoCut region is not damaged. The first signal is applied to the lower electrode 130 through the transistor and the drain pad 105 embedded in the active matrix 100 from the outside.

Subsequently, a strained layer 135 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 130. The strained layer 135 is formed to have a thickness of about 0.1 to 1.0 mu m, preferably about 0.4 mu m using a sol-gel method, a sputtering method, or a chemical vapor deposition method. In addition, the strained layer 190 is subjected to a heat treatment by a rapid heat treatment (RTA) method to cause phase shift. The deformable layer 190 has a second signal applied to the upper electrode 140 and a first signal applied to the lower electrode 130 to generate an electric field generated according to a potential difference between the upper electrode 140 and the lower electrode 130. Causes deformation.

The upper electrode 140 is formed on the deformation layer 190. The upper electrode 140 is formed to have a thickness of about 0.01 to 1.0 μm by sputtering a metal having electrical conductivity and reflectivity such as aluminum (Al), silver (Ag), or platinum (Pt). The second signal is applied to the upper electrode 140 through a common electrode line (not shown) from the outside. Since the upper electrode 140 has excellent electrical conductivity and reflectivity, the upper electrode 140 performs not only a function of a bias electrode but also a mirror reflecting incident light.

Referring to FIG. 6D, the upper electrode 140, the strain layer 135, and the lower electrode 130 are sequentially patterned into a predetermined pixel shape. In detail, the upper electrode 140 is patterned into a predetermined pixel shape using a photolithography process, and the deforming layer 135 and the lower electrode 130 are patterned into a predetermined pixel shape using the same method. do.

Subsequently, the via layer 145 is sequentially etched from one side of the deformable layer 135 by sequentially deforming the deformable layer 135, the lower electrode 130, the support layer 125, the etch stop layer 115, and the protective layer 110. To form. Thus, the via hole 145 is formed from one side of the strained layer 135 to the drain pad 105. Subsequently, the via contact 150 is formed by depositing a sputtering method on a metal having excellent electrical conductivity such as tungsten (W), aluminum (Al), or titanium (Ti). The via contact 150 electrically connects the drain pad 105 and the lower electrode 130. Therefore, the first signal applied from the outside is applied to the lower electrode 130 through the transistor, the drain pad 105, and the via contact 150 embedded in the active matrix 100. Subsequently, the support layer 125 is patterned into a predetermined pixel shape.

Referring to FIG. 6E, the sacrificial layer 120 is etched using hydrogen fluoride (HF) vapor to form an air gap 160, followed by a rinse and dry process to perform an AMA device. Complete

After completing the M × N thin film type AMA devices as described above, the active matrix 100 is sputtered or evaporated from a metal such as chromium (Cr), nickel (Ni), or gold (Au). It is deposited at the bottom of the to form an ohmic contact (not shown). In addition, an active matrix may be prepared in preparation for bonding a tape carrier package (TCP) (not shown) for applying a second signal to a subsequent upper electrode 140 and a first signal to the lower electrode 130. 100) is cut to a predetermined thickness. Subsequently, expose the pads of the AMA panel so that the pads (not shown) of the AMA panel have a sufficient height in preparation for TCP bonding, and cut the active matrix 100 completely into a predetermined shape, and then the pads and TCP of the AMA panel. The pad is connected to an anisotropic conductive film (ACF) (not shown) to complete the manufacture of the thin film AMA module.

In the above-described thin film type optical path control device according to the present invention, the first signal transmitted from the outside through the pad of the TCP and the pad of the AMA panel is a transistor, a drain pad 105 and a via contact (embedded in the active matrix 100). It is applied to the lower electrode 130 through 150. At the same time, a second signal is applied to the upper electrode 140 from the outside through a pad of TCP, a pad of an AMA panel, and a common electrode line to generate an electric field according to a potential difference between the upper electrode 140 and the lower electrode 130. . Due to this electric field, the deformation layer 135 formed between the upper electrode 140 and the lower electrode 130 causes deformation. The strained layer 135 contracts in a direction orthogonal to the electric field, whereby the actuator 200 is bent at a predetermined angle. The upper electrode 140, which also functions as a mirror that reflects light, is formed on the actuator 200 and is inclined together with the actuator 200. Accordingly, the upper electrode 140 reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

As described above, according to the method of manufacturing the thin film type optical path adjusting apparatus, the etching rate is different from the material constituting the lower electrode on the upper portion of the support layer, and the etching rate is similar to that of the material constituting the support layer. After depositing the material having an etch stop layer to form an etch stop layer, the etch stop layer is left only on the portion to be IsoCut in a subsequent process through a photolithography process and the remaining portions are removed. Accordingly, when the etching process for patterning the strained layer, the lower electrode, and the support layer into a predetermined pixel shape is performed, the Iso­Cut region is protected by the etch stop layer, thereby minimizing damage to the Iso­Cut region.

Therefore, the hydrogen fluoride vapor is prevented from penetrating through the IsoCut site during the etching process of the sacrificial layer using hydrogen fluoride (HF) vapor, thereby preventing the malfunction of the device and improving the yield. .

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (4)

Providing an active matrix including M × N (M, N is an integer) transistors and including a drain pad formed on one side; And On the top of the active matrix, i) forming a support layer in parallel with the active matrix on one side is in contact with the top of the active matrix and the other side through the air gap, ii) forming an etch stop layer on the support layer After patterning it to leave the etch stop layer only on the IsoCut site to be formed in a subsequent process, i) forming a lower electrode on top of the etch stop layer and the support layer, and then the etch stop layer below the lower electrode IsoCut the formed portion, i) forming a strained layer on top of the lower electrode, and v) forming an actuator having a step of forming an upper electrode on the strained layer. Method of manufacturing the device. The thin film type optical path of claim 1, wherein the etch stop layer is formed of a material having an etch rate different from a material constituting the lower electrode and an etch rate similar to a material constituting the support layer. Method of manufacturing the regulating device. The method of claim 2, wherein the etch stop layer is formed using a plasma-enhanced chemical vapor deposition (PECVD) method. The method of claim 1, wherein the Iso­Cut is to remove the lower electrode narrower than the etch stop layer.