KR100256869B1 - Method for manufacturing thin flim actuated mirror array - Google Patents

Abstract

PURPOSE: A thin-film micromirror array-actuated(TMA) manufacturing method prevents the permeation of a hydrogen fluoride vapor towards an active matrix or an active layer through an Iso-Cut portion during the etching process of a sacrificial layer, thereby preventing the damage of the active matrix. CONSTITUTION: An etch passivation layer(165) of an amorphous silicon not to be etched by a hydrogen fluoride(HF) vapor during the etching process of a sacrificial layer is etched only to cover an Iso-Cut portion. An air gap is formed in the position of the sacrificial layer by etching the sacrificial layer using the HF vapor. At this time, the HF vapor is not permeated towards an active matrix(100) and an active layer(135) through the Iso-Cut portion because the Iso-Cut portion is covered by the etch passivation layer(165).

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control device using an Actuated Mirror Array (AMA), and more particularly, to the lower part of the IsoCut part when etching processes for patterning the deformed layer, the lower electrode, and the support layer into pixel shapes, respectively. The present invention relates to a method for manufacturing a thin film type optical path control device capable of preventing the upper portion from being attacked.

Spatial light modulators, which are devices for projecting optical energy onto a screen, can be applied to various fields such as optical communication, image processing, and information display devices. The image processing apparatus using the optical path adjusting device or the spatial light modulator typically has a direct-view image display device and a projection-type image device according to a method of displaying optical energy on a screen. display device).

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display apparatuses include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (10% or more) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a bright and clear image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric picture signal and the bias signal. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect the incident light at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ) or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. The actuator may also be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by a sawing method and installing a mirror thereon. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the strained layer is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in Korean Patent Application No. 96-42197 (name of the invention: a method of manufacturing a thin film type optical path control device that can control the stress of the membrane) filed by the applicant of the Korean Patent Office on September 24, 1996. It is.

Figure 1b shows a cross-sectional view of the thin film type optical path control device described in the preceding application.

Referring to FIG. 1B, the thin film type optical path adjusting device includes an active matrix 1 and an actuator 60. An active matrix 1 having an M × N (M, N is an integer) MOS transistor embedded therein and having a drain pad 5 extending from a drain region of the transistor includes the active matrix 1 and a drain pad. The protective layer 10 stacked on the upper portion of the (5) and the etch stop layer 15 stacked on the protective layer 10 is included.

The actuator 60 has one side in contact with a portion in which the drain pad 5 is formed below the etch stop layer 15, and the other side has a membrane 30 and a membrane formed horizontally through the air gap 25. The lower electrode 35 stacked on the upper portion 30, the strained layer 40 stacked on the lower electrode 35, the upper electrode 45 stacked on the strained layer 40, and the strained layer ( The lower electrode 35 in the via hole 50 vertically formed from one side of the 40 to the drain pad 5 through the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. And the drain pad 5 include a via contact 55 formed to be electrically connected to each other.

A stripe 46 is formed on a portion of the upper electrode 45. The stripe 46 uniformly operates the upper electrode 45 so that light incident from the light source is diffusely reflected at the boundary between the portion of the upper electrode 45 that is deformed and the portion that is not deformed according to the deformation of the strained layer 40. To prevent them.

Hereinafter, a manufacturing method of the thin film type optical path control device will be described with reference to FIGS. 1A to 1B.

Referring to FIG. 1A, on an active matrix 1 in which M × N (M, N is an integer) embedded MOS transistors (not shown) and a drain pad 5 extending from a drain region of the MOS transistor are formed. A protective layer 10 made of phosphorus silicate glass PSG is formed. The protective layer 10 is formed to have a thickness of about 1.0 μm using a chemical vapor deposition (CVD) method. The protective layer 10 protects the active matrix 1 in which the transistor is embedded during subsequent processing.

An etch stop layer 15 made of nitride is formed on the protective layer 10. The etch stop layer 15 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the protective layer 10 and the active matrix 1 from being etched and damaged during the subsequent etching process.

The sacrificial layer 20 is formed on the etch stop layer 15. The sacrificial layer 20 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 μm by using an atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 20 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 20 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 20 in which the drain pad 5 is formed is etched to expose a portion of the etch stop layer 15, thereby making a position where the support of the actuator 60 is to be formed.

Referring to FIG. 1B, the membrane 30 is formed on the exposed etch stop layer 15 and the sacrificial layer 20 with a thickness of about 0.1 μm to about 1.0 μm. Membrane 30 is formed using low pressure chemical vapor deposition (LPCVD). At this time, by forming the membrane 30 while varying the ratio of the reaction gas in the reaction vessel of low pressure, the stress in the membrane 30 is controlled.

The lower electrode 35 made of a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum is formed on the membrane 30. Subsequently, the lower electrode 35 is separated for each pixel so that an independent first signal (image signal) is applied to each pixel (Iso­Cut etching process).

The deformation layer 40 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 35. The strained layer 40 is formed to have a thickness of about 0.1 μm to about 1.0 μm, preferably about 0.4 μm using a sol-gel method, and then heat treated by a rapid heat treatment (RTA) method. Phase change the piezoelectric material constituting 40). The deformable layer 40 is applied with a second signal (bias signal) to the upper electrode 45 and a first signal is applied to the lower electrode 35 so that a potential difference between the upper electrode 45 and the lower electrode 35 is applied. Deformation is caused by the electric field generated.

An upper electrode 45 is formed on the strained layer 40. The upper electrode 45 is formed of a metal having electrical conductivity and reflectivity, such as aluminum or platinum, to have a thickness of about 0.1 to 1.0 μm using a sputtering method. The second signal is applied to the upper electrode 45 through a common electrode line (not shown) from the outside. The upper electrode 45 functions not only as a bias electrode for generating an electric field but also as a mirror for reflecting light incident from a light source.

Subsequently, the upper electrode 45 is patterned into a predetermined pixel shape. In this case, the stripe 46 is patterned to form a portion of the upper electrode 45. Subsequently, the strained layer 40 and the lower electrode 35 are sequentially patterned into a predetermined pixel shape, and then, from one side of the strained layer 40 to an upper portion of the drain pad 5, the strained layer 40 and the bottom thereof. The via hole 50 is formed by sequentially etching the electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. Subsequently, a metal such as tungsten, platinum or titanium is deposited by a lift-off method to form a via contact 55 that electrically connects the drain pad 5 and the lower electrode 35. Therefore, the via contact 55 is formed vertically from the lower electrode 35 to the top of the drain pad 5 in the via hole 50. Therefore, the first signal applied from the outside is applied to the lower electrode 35 through the transistor, the drain pad 5, and the via contact 55 embedded in the active matrix 1.

Subsequently, a photoresist (not shown) is applied to the entire surface of the resultant product in which the via contact 55 is formed and patterned to expose the membrane 30. Subsequently, the membrane 30 is patterned into a predetermined pixel shape using the photoresist as a mask. After the air gap 25 is formed by etching the sacrificial layer 20 using 49% hydrogen fluoride (HF) vapor, the AMA device is completed by performing a cleaning and drying process.

In the above-described thin film type optical path adjusting device, the first signal is applied to the lower electrode 35 through the MOS transistor, the drain pad 5, and the via contact 55 embedded in the active matrix 1. At the same time, a second signal is applied to the upper electrode 45 through a common electrode line (not shown) from the outside to generate an electric field between the upper electrode 45 and the lower electrode 35. Due to this electric field, the strained layer 40 stacked between the upper electrode 45 and the lower electrode 35 causes deformation. The strained layer 40 contracts in a direction perpendicular to the electric field, and the actuator 60 including the strained layer 40 is bent upward at a predetermined angle. Therefore, the upper electrode 45 on the actuator 60 is also inclined in the same direction. Light incident from the light source is reflected by the upper electrode 45 at a predetermined angle, and then is projected onto the screen to form an image.

However, in the above-described manufacturing method of the thin film type optical path control apparatus, there is a problem that the Iso­Cut part is damaged when etching processes for patterning the strained layer, the lower electrode, and the membrane into a predetermined pixel shape, respectively. This will be described in more detail with reference to the drawings.

2 is an enlarged plan view of an Iso ICut part in the above-described thin film type optical path control device, and FIG. 3 is a sectional view taken along the line BB ′ of FIG. 2.

2 and 3, in the above-described manufacturing method of the thin film type optical path control apparatus, when etching processes for patterning the strained layer 40, the lower electrode 35, and the membrane 30 into a predetermined pixel shape, respectively, are performed. The IsoCut portion (see A) is exposed without being covered with a photoresist (not shown). Therefore, during the etching process, the membrane 30 of the Iso­Cut part A is over-etched to be etched down to the etch stop layer 15 thereunder. As a result, when the sacrificial layer 20 is etched using hydrogen fluoride (HF) vapor, hydrogen fluoride vapor (HF) penetrates through the etched portion of the etch stop layer 15 (arrow in FIG. 3). A problem arises in that the lower protective layer 10 and the active matrix 1 having the transistor embedded therein, or a strained layer made of a piezoelectric material such as PZT thereon, are damaged.

Therefore, an object of the present invention is to damage the protective layer and the active matrix of the lower portion of the IsoCut portion, or the strained layer thereon when the etching processes for patterning the thin films constituting the actuator, such as the strained layer, the lower electrode and the support layer, respectively, into pixel shapes. It is to provide a method of manufacturing a thin film type optical path control device that can prevent the.

1A and 1B are cross-sectional views illustrating a method of manufacturing a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is an enlarged plan view of an Iso-Cut part in a thin film type optical path adjusting apparatus according to the manufacturing method described in the preceding application. FIG.

3 is a cross-sectional view of the apparatus shown in FIG. 2 taken along line B-B '.

4 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. 4 taken along line C-C '.

6A is a cross-sectional view illustrating a step of forming a support part of the actuator along the line CC ′ of FIG. 4.

6B is a cross-sectional view illustrating the stacking of the upper electrode along the line CC ′ of FIG. 4.

6C is a cross-sectional view illustrating a step of forming a via contact along the line CC ′ of FIG. 4.

6D is a cross-sectional view illustrating a step of forming an etch protective layer along the line D-D ′ of FIG. 4.

6E is a cross-sectional view illustrating a step of forming an air gap along the line CC ′ in FIG. 4.

FIG. 7 is a cross-sectional view illustrating a step of forming an etch protective layer according to another embodiment of the present invention along the line D-D ′ of FIG. 4.

<Explanation of symbols for main parts of drawing>

100: active matrix 105: drain pad

110: protective layer 115: etch stop layer

125: support layer 130: lower electrode

135 strain layer 140 upper electrode

145: Beer Hall 150: Beer Contact

160: air gap 165: etching protective layer

In order to achieve the above object of the present invention, there is provided a method comprising: providing an active matrix including a drain pad in which M x N (M, N is an integer) transistors are formed and extend from a drain of the transistor; Forming a sacrificial layer on the active matrix, and then patterning the sacrificial layer to expose a portion of the active matrix in which a drain pad is formed; And i) forming a support layer on top of the exposed active matrix and the sacrificial layer, ii) forming a bottom electrode on top of the support layer, and then IsoCut the bottom electrode for each pixel, i) the bottom Sequentially forming a strained layer and an upper electrode on the electrode, iii) sequentially etching the upper electrode, the strained layer, the lower electrode, and the support layer into a pixel shape, iii) applying an etch protective layer to cover the IsoCut portion Forming, and iii) forming an actuator having a step of removing the sacrificial layer to form an air gap.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after the patterning to a predetermined pixel shape to the support layer, an etch protective layer made of a material such as amorphous silicon is deposited and then patterned to leave the etch protective layer of IsoCut part and the rest Etch it. The etch protection layer may be etched in the same pattern as the support layer, or may be etched using a mask covering only the Iso­Cut part.

Therefore, since the etch protective layer protects the IsoCut portion, the hydrogen fluoride vapor penetrates into the active matrix or the strained layer through the IsoCut portion during the etching process of the sacrificial layer using hydrogen fluoride (HF) vapor, thereby forming the active matrix or the strained layer. This damage can be prevented.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

4 is a plan view of a thin film type optical path adjusting apparatus according to the present invention, and FIG. 5 is a cross-sectional view taken along line C′C ′ of the apparatus shown in FIG. 4.

4 and 5, the thin film type optical path adjusting apparatus according to the present invention includes an active matrix 100 and an actuator 200 formed on the active matrix 100.

An active matrix 100 having an M × N (M, N is an integer) MOS transistor embedded therein and having a drain pad 105 extending from the drain of the transistor includes the active matrix 100 and the drain pad 105. Protection layer 110 stacked on top of the protective layer 110, and an etch stop layer 115 stacked on the protective layer 110.

The actuator 200 has a support layer 125 and a support layer 125 formed at one side thereof in contact with a portion of the etch stop layer 115 at which a drain pad 105 is formed and the other side of the actuator 200 formed horizontally through an air gap 160. ), A lower electrode 130 formed on the upper side, a strained layer 135 formed on the lower electrode 130, an upper electrode 140 formed on the strained layer 135, and one side of the strained layer 135. The via hole 145 formed vertically to the drain pad 105 through the strained layer 135, the lower electrode 130, the support layer 125, the etch stop layer 115, and the protective layer 110. A via contact 150 is formed to connect the drain pad 105 and the lower electrode 130.

In addition, referring to FIG. 4, one side of the plane of the support layer 125 has a concave portion having a rectangular shape at the center thereof, and the concave portion is formed in a shape that is stepped toward both edges. The other side of the plane of the support layer 125 has a rectangular protrusion that narrows stepwise toward the central portion corresponding to the concave portion. Therefore, the protruding portion of the support layer of the actuator adjacent to the concave portion of the support layer 125 is fitted, and the rectangular projection is fitted into the concave portion of the support layer of the adjacent actuator. The support layer 125 performs the function of the membrane 30 supporting the actuator of the thin film type optical path adjusting device described in the previous application.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

FIG. 6A illustrates the step of explaining the support of the actuator 200 along the line CC ′ in FIG. 4.

Referring to FIG. 6A, a protective layer is formed on an active matrix 100 in which M × N (M and N are integers) MOS transistors (not shown) are formed and drain pads 105 extending from the drains of the transistors are formed. Form 110. The active matrix 100 is made of a semiconductor such as silicon or an insulating material such as glass or alumina (Al ₂ O ₃ ). The protective layer 110 may be formed to have a thickness of about 0.1 μm to about 1.0 μm by using a chemical vapor deposition (CVD) method. The protective layer 110 prevents damage to the active matrix 100 in which the transistor is embedded during a subsequent process.

An etch stop layer 115 is formed on the passivation layer 110. The etch stop layer 115 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 115 prevents the protective layer 110 and the active matrix 100 having the transistor embedded therein from being etched during the subsequent etching process. The sacrificial layer 120 is formed on the etch stop layer 115. The sacrificial layer 120 is formed by depositing a phosphorus silicate glass (PSG) having a high concentration of phosphorus (PG) to a thickness of about 2.0 to 3.3 μm using an atmospheric chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 120 covers the upper portion of the active matrix 100 in which the transistor is embedded, the flatness of the surface is very poor. Therefore, the surface of the sacrificial layer 120 is planarized by polishing using a spin on glass (SOG) method or a chemical mechanical polishing (CMP) method. Subsequently, a portion of the sacrificial layer 120 in which the drain pad 105 is formed is etched to expose a portion of the etch stop layer 115 to form a position at which the support portion of the actuator 200 is to be formed.

FIG. 6B illustrates the step of forming the upper electrode 140, taken along line CC ′ in FIG. 4.

Referring to FIG. 6B, a support layer 125 is formed on the exposed etch stop layer 115 and on the sacrificial layer 120. The support layer 125 is formed to have a thickness of about 0.1 to 1.0 μm using a low pressure chemical vapor deposition (LPCVD) method.

The lower electrode 130 is formed on the support layer 125. The lower electrode 130 is formed to have a thickness of about 0.1 μm to about 1.0 μm by sputtering a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta). Subsequently, by separating the lower electrode 130 for each pixel, the lower electrode 130 is isoCut so that an independent first signal (image signal) is applied to each pixel. The first signal is applied to the lower electrode 130 through the transistor and the drain pad 105 embedded in the active matrix 100 from the outside.

A deformation layer 135 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 130. The strained layer 135 is formed to have a thickness of about 0.1 to 1.0 μm, preferably about 0.4 μm, using a sol-gel method, a sputtering method, or a chemical vapor deposition method. In addition, the piezoelectric material constituting the strained layer 135 is thermally transformed by a rapid heat treatment (RTA) method. The strained layer 135 is applied with a second signal (bias signal) to the upper electrode 140 and a first signal is applied to the lower electrode 130 so that a potential difference between the upper electrode 140 and the lower electrode 130 is applied. Deformation is caused by the electric field generated.

An upper electrode 140 is formed on the strained layer 135. The upper electrode 140 is formed to have a thickness of about 0.1 to 1.0 μm by sputtering a metal having electrical conductivity and reflectivity such as aluminum (Al), silver (Ag), or platinum (Pt). The second signal is applied to the upper electrode 140 through a common electrode line (not shown) from the outside. Since the upper electrode 140 has electrical conductivity and reflectivity, the upper electrode 140 functions not only as a bias electrode for generating an electric field but also as a mirror for reflecting incident light.

FIG. 6C illustrates forming via contact 150, taken along line CC ′ in FIG. 4.

Referring to FIG. 6C, the upper electrode 140, the strain layer 135, and the lower electrode 130 are sequentially patterned into a predetermined pixel shape. In detail, the upper electrode 140 is patterned into a predetermined pixel shape using a photolithography process, and the strained layer 135 and the lower electrode 130 are respectively shaped into a predetermined pixel shape using the same method. Pattern.

Next, the via hole 145 is sequentially etched from one side of the strained layer 135 by sequentially etching the strained layer 135, the lower electrode 130, the support layer 125, the etch stop layer 115, and the protective layer 110. To form. Thus, the via hole 145 is formed from one side of the strained layer 135 to the drain pad 105. Subsequently, a via contact 150 is formed by depositing a metal having electrical conductivity such as tungsten (W), aluminum (Al), or titanium (Ti) in the via hole 145 using a sputtering method. The via contact 150 electrically connects the drain pad 105 and the lower electrode 130. Therefore, the first signal applied from the outside is applied to the lower electrode 130 through the transistor embedded in the active matrix 100, the drain pad 105, and the via contact 150. The support layer 125 is patterned into a predetermined pixel shape. That is, the support layer 125 is patterned into a predetermined pixel shape including an Iso­Cut portion by using a photolithography process.

FIG. 6D illustrates forming an etch protective layer 165 along the line D-D ′ of FIG. 4.

Referring to FIG. 6D, after the support layer 125 is patterned as described above, an etch protection layer 165 is formed on the resultant. The etch protection layer 165 may be formed of a material that is not etched during the etching process of the sacrificial layer 120 using subsequent hydrogen fluoride (HF) vapor, and more preferably, plasma-enhanced amorphous silicon. It is formed using a chemical vapor deposition (PECVD) method. Subsequently, the etch protection layer 165 is etched in the same pattern as the support layer 125 using a mask used when patterning the support layer 125.

In addition, as shown in FIG. 7, the etch protection layer 165 may be etched to cover only the Iso­Cut part.

FIG. 6E illustrates forming an air gap 160, along line CC ′ in FIG. 4.

Referring to FIG. 6E, the sacrificial layer 120 is etched using hydrogen fluoride (HF) vapor to form an air gap 160 at the position of the sacrificial layer 120. In this case, since the IsoCut portion is covered with an etch protective layer 165 made of a material (PECVD amorphous silicon) that is not etched in the hydrogen fluoride vapor, the hydrogen fluoride vapor is transferred to the active matrix 100 or modified through the IsoCut portion. Penetration into the layer 135 may be prevented.

Subsequently, the etch protection layer 165 is removed by a blanket dry etch method, cleaned and dried to complete an AMA device.

In the above-described thin film type optical path control device according to the present invention, the first signal applied from the outside is applied to the lower electrode 130 through the transistor, the drain pad 105 and the via contact 150 embedded in the active matrix 100. Is approved. At the same time, the second signal is applied to the upper electrode 140 from the outside through the common electrode line, thereby generating an electric field according to the potential difference between the upper electrode 140 and the lower electrode 130. Due to this electric field, the deformation layer 135 formed between the upper electrode 140 and the lower electrode 130 causes deformation. The strained layer 135 contracts in a direction orthogonal to the electric field, whereby the actuator 200 is bent at a predetermined angle. The upper electrode 140, which also functions as a mirror that reflects light, is formed on the actuator 200 and is inclined together with the actuator 200. Accordingly, the upper electrode 140 reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

As described above, according to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after patterning in a pixel shape up to the support layer, an etch protective layer made of a material such as amorphous silicon is deposited, leaving an etch protective layer of IsoCut part and etching the rest. do. The etch protection layer may be etched in the same pattern as the support layer, or may be etched using a mask covering only the Iso­Cut part.

Therefore, since the etch protective layer protects the Iso-Cut part, the hydrogen fluoride vapor is prevented from penetrating into the active matrix or the strained layer through the IsoCut part during the etching process of the sacrificial layer using hydrogen fluoride (HF) vapor. The protective layer and the active matrix or strain layer can be prevented from being damaged.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (6)

Providing an active matrix comprising M × N (M, N is an integer) transistors and including drain pads extending from the drains of the transistors; Forming a sacrificial layer on the active matrix, and then patterning the sacrificial layer to expose a portion of the active matrix in which a drain pad is formed; And i) forming a support layer on top of the exposed active matrix and the sacrificial layer, ii) forming a bottom electrode on top of the support layer, and then IsoCut the bottom electrode for each pixel, iii) the bottom electrode Sequentially forming a strained layer and an upper electrode on the upper side of, i) sequentially etching the upper electrode, the strained layer, the lower electrode and the support layer into a pixel shape, and iii) forming an etch protective layer to cover the IsoCut part. And iii) forming an actuator comprising removing the sacrificial layer to form an air gap. The method of claim 1, wherein forming an etch protective layer to cover the IsoCut portion comprises: depositing an etch protective layer on top of a resultant product of which the support layer is etched in a pixel shape, and forming the etch protective layer on the same layer as the support layer. The method of manufacturing a thin film type optical path control device further comprising the step of etching in a pattern. The method of claim 1, wherein the forming of the etch protective layer to cover the IsoCut portion comprises: depositing an etch protective layer on the resultant of the support layer being etched in a pixel shape, and using the mask to cover the IsoCut portion. The method of manufacturing a thin film type optical path control device, further comprising the step of etching the etching protective layer. The method of claim 1, wherein the etching protection layer is formed using amorphous silicon. The method of claim 1, wherein the etching protection layer is formed using a plasma-enhanced chemical vapor deposition (PECVD) method. The method of claim 1, wherein the forming of the actuator further comprises removing the etch protective layer by a blanket etching method.

Images