KR100250182B1 - 반도체결정의 형성방법 및 반도체소자 - Google Patents

반도체결정의 형성방법 및 반도체소자 Download PDF

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Publication number
KR100250182B1
KR100250182B1 KR1019930011301A KR930011301A KR100250182B1 KR 100250182 B1 KR100250182 B1 KR 100250182B1 KR 1019930011301 A KR1019930011301 A KR 1019930011301A KR 930011301 A KR930011301 A KR 930011301A KR 100250182 B1 KR100250182 B1 KR 100250182B1
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KR
South Korea
Prior art keywords
thin film
semiconductor
semiconductor thin
crystal
film
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019930011301A
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English (en)
Korean (ko)
Other versions
KR940006187A (ko
Inventor
도시유끼 사메시마
마사끼 하라
나오끼 사노
팔 고사인 다람
아쓰시 고노
웨스트워터 조나단
세쓰오 우스이
Original Assignee
이데이 노부유끼
소니 가부시끼 가이샤
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Publication date
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Publication of KR940006187A publication Critical patent/KR940006187A/ko
Application granted granted Critical
Publication of KR100250182B1 publication Critical patent/KR100250182B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02686—Pulsed laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
KR1019930011301A 1992-06-23 1993-06-21 반도체결정의 형성방법 및 반도체소자 Expired - Fee Related KR100250182B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP18737392 1992-06-23
JP92-187,373 1992-06-23
JP08683593A JP3321890B2 (ja) 1992-06-23 1993-03-23 半導体結晶の形成方法及び半導体素子
JP93-86,835 1993-03-23

Publications (2)

Publication Number Publication Date
KR940006187A KR940006187A (ko) 1994-03-23
KR100250182B1 true KR100250182B1 (ko) 2000-05-01

Family

ID=26427917

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930011301A Expired - Fee Related KR100250182B1 (ko) 1992-06-23 1993-06-21 반도체결정의 형성방법 및 반도체소자

Country Status (6)

Country Link
US (1) US5431126A (enExample)
EP (1) EP0575965B1 (enExample)
JP (1) JP3321890B2 (enExample)
KR (1) KR100250182B1 (enExample)
DE (1) DE69330583T2 (enExample)
TW (1) TW282576B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5976959A (en) * 1997-05-01 1999-11-02 Industrial Technology Research Institute Method for forming large area or selective area SOI
JP4836333B2 (ja) * 2000-01-28 2011-12-14 株式会社半導体エネルギー研究所 半導体装置
US6642085B1 (en) * 2000-11-03 2003-11-04 The Regents Of The University Of California Thin film transistors on plastic substrates with reflective coatings for radiation protection
JP2004207691A (ja) * 2002-12-11 2004-07-22 Sharp Corp 半導体薄膜の製造方法、その製造方法により得られる半導体薄膜、その半導体薄膜を用いる半導体素子および半導体薄膜の製造装置
US7402445B2 (en) * 2005-05-16 2008-07-22 Wayne State University Method of forming micro-structures and nano-structures
US20090218732A1 (en) * 2008-02-29 2009-09-03 David Cron System and method for edge heating of stretch film
JP5669439B2 (ja) * 2010-05-21 2015-02-12 株式会社半導体エネルギー研究所 半導体基板の作製方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4262411A (en) * 1977-09-08 1981-04-21 Photon Power, Inc. Method of making a solar cell array
DE2831819A1 (de) * 1978-07-19 1980-01-31 Siemens Ag Verfahren zum abscheiden von silicium in feinkristalliner form
US4388145A (en) * 1981-10-29 1983-06-14 Xerox Corporation Laser annealing for growth of single crystal semiconductor areas
JPS61108121A (ja) * 1984-11-01 1986-05-26 Sharp Corp 半導体装置の製造方法
US4751193A (en) * 1986-10-09 1988-06-14 Q-Dot, Inc. Method of making SOI recrystallized layers by short spatially uniform light pulses
US4897366A (en) * 1989-01-18 1990-01-30 Harris Corporation Method of making silicon-on-insulator islands
US5256562A (en) * 1990-12-31 1993-10-26 Kopin Corporation Method for manufacturing a semiconductor device using a circuit transfer film
JP3213338B2 (ja) * 1991-05-15 2001-10-02 株式会社リコー 薄膜半導体装置の製法

Also Published As

Publication number Publication date
EP0575965B1 (en) 2001-08-16
EP0575965A2 (en) 1993-12-29
JPH06168876A (ja) 1994-06-14
DE69330583D1 (de) 2001-09-20
KR940006187A (ko) 1994-03-23
JP3321890B2 (ja) 2002-09-09
DE69330583T2 (de) 2002-06-13
TW282576B (enExample) 1996-08-01
EP0575965A3 (en) 1997-10-08
US5431126A (en) 1995-07-11

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