KR0137902B1 - Mos transistor & manufacturing method thereof - Google Patents

Mos transistor & manufacturing method thereof

Info

Publication number
KR0137902B1
KR0137902B1 KR94001571A KR19940001571A KR0137902B1 KR 0137902 B1 KR0137902 B1 KR 0137902B1 KR 94001571 A KR94001571 A KR 94001571A KR 19940001571 A KR19940001571 A KR 19940001571A KR 0137902 B1 KR0137902 B1 KR 0137902B1
Authority
KR
South Korea
Prior art keywords
manufacturing
mos transistor
mos
transistor
Prior art date
Application number
KR94001571A
Other languages
English (en)
Other versions
KR950024362A (ko
Inventor
Hyuk-Jin Kwon
Chang-Jae Lee
Original Assignee
Lg Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Semicon Co Ltd filed Critical Lg Semicon Co Ltd
Priority to KR94001571A priority Critical patent/KR0137902B1/ko
Priority to JP18314994A priority patent/JP3510924B2/ja
Priority to US08/376,517 priority patent/US5583064A/en
Publication of KR950024362A publication Critical patent/KR950024362A/ko
Application granted granted Critical
Publication of KR0137902B1 publication Critical patent/KR0137902B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR94001571A 1994-01-28 1994-01-28 Mos transistor & manufacturing method thereof KR0137902B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR94001571A KR0137902B1 (en) 1994-01-28 1994-01-28 Mos transistor & manufacturing method thereof
JP18314994A JP3510924B2 (ja) 1994-01-28 1994-08-04 Ｍｏｓトランジスタの製造方法
US08/376,517 US5583064A (en) 1994-01-28 1995-01-23 Semiconductor device and process for formation thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR94001571A KR0137902B1 (en) 1994-01-28 1994-01-28 Mos transistor & manufacturing method thereof

Publications (2)

Publication Number Publication Date
KR950024362A KR950024362A (ko) 1995-08-21
KR0137902B1 true KR0137902B1 (en) 1998-04-27

Family

ID=19376400

Family Applications (1)

Application Number Title Priority Date Filing Date
KR94001571A KR0137902B1 (en) 1994-01-28 1994-01-28 Mos transistor & manufacturing method thereof

Country Status (3)

Country Link
US (1) US5583064A (ko)
JP (1) JP3510924B2 (ko)
KR (1) KR0137902B1 (ko)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814544A (en) * 1994-07-14 1998-09-29 Vlsi Technology, Inc. Forming a MOS transistor with a recessed channel
US5736435A (en) * 1995-07-03 1998-04-07 Motorola, Inc. Process for fabricating a fully self-aligned soi mosfet
US6008096A (en) * 1997-01-29 1999-12-28 Advanced Micro Devices, Inc. Ultra short transistor fabrication method
US5877056A (en) * 1998-01-08 1999-03-02 Texas Instruments-Acer Incorporated Ultra-short channel recessed gate MOSFET with a buried contact
JP3461277B2 (ja) * 1998-01-23 2003-10-27 株式会社東芝 半導体装置及びその製造方法
US6034396A (en) * 1998-01-28 2000-03-07 Texas Instruments - Acer Incorporated Ultra-short channel recessed gate MOSFET with a buried contact
US5998835A (en) * 1998-02-17 1999-12-07 International Business Machines Corporation High performance MOSFET device with raised source and drain
US6117712A (en) * 1998-03-13 2000-09-12 Texas Instruments - Acer Incorporated Method of forming ultra-short channel and elevated S/D MOSFETS with a metal gate on SOI substrate
US5956580A (en) * 1998-03-13 1999-09-21 Texas Instruments--Acer Incorporated Method to form ultra-short channel elevated S/D MOSFETS on an ultra-thin SOI substrate
US6355955B1 (en) * 1998-05-14 2002-03-12 Advanced Micro Devices, Inc. Transistor and a method for forming the transistor with elevated and/or relatively shallow source/drain regions to achieve enhanced gate electrode formation
US6465842B2 (en) * 1998-06-25 2002-10-15 Kabushiki Kaisha Toshiba MIS semiconductor device and method of fabricating the same
US6528847B2 (en) * 1998-06-29 2003-03-04 Advanced Micro Devices, Inc. Metal oxide semiconductor device having contoured channel region and elevated source and drain regions
GB2354880A (en) * 1999-09-30 2001-04-04 Mitel Semiconductor Ltd Metal oxide semiconductor field effect transistors
US7391087B2 (en) * 1999-12-30 2008-06-24 Intel Corporation MOS transistor structure and method of fabrication
TW439299B (en) * 2000-01-11 2001-06-07 United Microelectronics Corp Manufacturing method of metal oxide semiconductor having selective silicon epitaxial growth
KR100370129B1 (ko) * 2000-08-01 2003-01-30 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
KR100374552B1 (ko) * 2000-08-16 2003-03-04 주식회사 하이닉스반도체 엘리베이티드 소스/드레인을 갖는 반도체 소자 제조방법
KR100450667B1 (ko) * 2001-10-09 2004-10-01 삼성전자주식회사 유효 채널 길이를 연장시킬 수 있는 반도체 소자의 홈 형성방법
US6884269B2 (en) 2002-06-13 2005-04-26 Fuelcell Energy, Inc. Continuous method for manufacture of uniform size flake or powder
KR100464270B1 (ko) * 2003-02-04 2005-01-03 동부아남반도체 주식회사 모스펫 소자 제조 방법
KR100505113B1 (ko) * 2003-04-23 2005-07-29 삼성전자주식회사 모스 트랜지스터 및 그 제조방법
KR100518606B1 (ko) * 2003-12-19 2005-10-04 삼성전자주식회사 실리콘 기판과 식각 선택비가 큰 마스크층을 이용한리세스 채널 어레이 트랜지스터의 제조 방법
US7101743B2 (en) 2004-01-06 2006-09-05 Chartered Semiconductor Manufacturing L.T.D. Low cost source drain elevation through poly amorphizing implant technology
JP5014118B2 (ja) 2005-02-23 2012-08-29 スパンション エルエルシー フラッシュメモリを備える半導体装置の製造方およびフラッシュメモリを備える半導体装置
KR100631960B1 (ko) * 2005-09-16 2006-10-04 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
US9716139B2 (en) * 2015-06-02 2017-07-25 United Microelectronics Corp. Method for forming high voltage transistor

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785266A (en) * 1980-11-17 1982-05-27 Toshiba Corp Zener diode
US4639274A (en) * 1984-11-28 1987-01-27 Fairchild Semiconductor Corporation Method of making precision high-value MOS capacitors
JPS62296472A (ja) * 1986-06-16 1987-12-23 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH0294477A (ja) * 1988-09-30 1990-04-05 Toshiba Corp 半導体装置及びその製造方法
US5248893A (en) * 1990-02-26 1993-09-28 Advanced Micro Devices, Inc. Insulated gate field effect device with a smoothly curved depletion boundary in the vicinity of the channel-free zone
US5108937A (en) * 1991-02-01 1992-04-28 Taiwan Semiconductor Manufacturing Company Method of making a recessed gate MOSFET device structure
US5342796A (en) * 1991-05-28 1994-08-30 Sharp Kabushiki Kaisha Method for controlling gate size for semiconduction process
JPH06112309A (ja) * 1992-09-28 1994-04-22 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JP3510924B2 (ja) 2004-03-29
KR950024362A (ko) 1995-08-21
JPH07226513A (ja) 1995-08-22
US5583064A (en) 1996-12-10

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