KR0136685B1 - Semiconductor device and fabricating method thereof - Google Patents

Semiconductor device and fabricating method thereof

Info

Publication number
KR0136685B1
KR0136685B1 KR94019713A KR19940019713A KR0136685B1 KR 0136685 B1 KR0136685 B1 KR 0136685B1 KR 94019713 A KR94019713 A KR 94019713A KR 19940019713 A KR19940019713 A KR 19940019713A KR 0136685 B1 KR0136685 B1 KR 0136685B1
Authority
KR
South Korea
Prior art keywords
semiconductor device
fabricating method
fabricating
semiconductor
Prior art date
Application number
KR94019713A
Other languages
English (en)
Other versions
KR950007023A (ko
Inventor
Kousaku Yano
Tatsuo Sugiyama
Satoshi Ueda
Noboru Nomura
Original Assignee
Mastushita Denki Sankyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mastushita Denki Sankyo Co Ltd filed Critical Mastushita Denki Sankyo Co Ltd
Publication of KR950007023A publication Critical patent/KR950007023A/ko
Application granted granted Critical
Publication of KR0136685B1 publication Critical patent/KR0136685B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832Multiple layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
KR94019713A 1993-08-23 1994-08-10 Semiconductor device and fabricating method thereof KR0136685B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP5207950A JPH0766287A (ja) 1993-08-23 1993-08-23 半導体装置及びその製造方法
JP93-207950 1993-08-23

Publications (2)

Publication Number Publication Date
KR950007023A KR950007023A (ko) 1995-03-21
KR0136685B1 true KR0136685B1 (en) 1998-04-29

Family

ID=16548228

Family Applications (1)

Application Number Title Priority Date Filing Date
KR94019713A KR0136685B1 (en) 1993-08-23 1994-08-10 Semiconductor device and fabricating method thereof

Country Status (6)

Country Link
US (2) US5723909A (ko)
EP (1) EP0643421B1 (ko)
JP (1) JPH0766287A (ko)
KR (1) KR0136685B1 (ko)
CN (1) CN1050694C (ko)
DE (1) DE69424728T2 (ko)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5576247A (en) * 1992-07-31 1996-11-19 Matsushita Electric Industrial Co., Ltd. Thin layer forming method wherein hydrophobic molecular layers preventing a BPSG layer from absorbing moisture
CN1118520A (zh) * 1994-04-15 1996-03-13 松下电器产业株式会社 多层金属布线的形成方法
KR0159016B1 (ko) * 1995-06-28 1999-02-01 김주용 반도체소자의 금속배선간 절연막의 제조방법
US5942802A (en) * 1995-10-09 1999-08-24 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of producing the same
JP2975917B2 (ja) * 1998-02-06 1999-11-10 株式会社半導体プロセス研究所 半導体装置の製造方法及び半導体装置の製造装置
JP3426494B2 (ja) * 1998-04-02 2003-07-14 沖電気工業株式会社 半導体装置の製造方法
US6294473B1 (en) * 1998-06-03 2001-09-25 Rodel Holdings Inc. Method of polishing substrates comprising silicon dioxide and composition relating thereto
US6395651B1 (en) * 1998-07-07 2002-05-28 Alliedsignal Simplified process for producing nanoporous silica
JP3248492B2 (ja) * 1998-08-14 2002-01-21 日本電気株式会社 半導体装置及びその製造方法
US6245690B1 (en) * 1998-11-04 2001-06-12 Applied Materials, Inc. Method of improving moisture resistance of low dielectric constant films
US6090707A (en) * 1999-09-02 2000-07-18 Micron Technology, Inc. Method of forming a conductive silicide layer on a silicon comprising substrate and method of forming a conductive silicide contact
US6449132B1 (en) 1999-10-05 2002-09-10 Seagate Technology Llc Dielectric gap material for magnetoresistive heads with conformal step coverage
US6576980B1 (en) 1999-11-30 2003-06-10 Agere Systems, Inc. Surface treatment anneal of hydrogenated silicon-oxy-carbide dielectric layer
US6674140B2 (en) 2000-02-01 2004-01-06 Analog Devices, Inc. Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
JP3944487B2 (ja) * 2000-04-11 2007-07-11 松下電器産業株式会社 半導体装置の製造装置
AU2001266998A1 (en) 2000-06-23 2002-01-08 Honeywell International, Inc. Method to restore hydrophobicity in dielectric films and materials
EP1559299A1 (en) * 2002-10-07 2005-08-03 Koninklijke Philips Electronics N.V. Method for manufacturing a light emitting display
US7709371B2 (en) 2003-01-25 2010-05-04 Honeywell International Inc. Repairing damage to low-k dielectric materials using silylating agents
CN1742363B (zh) 2003-01-25 2010-10-13 霍尼韦尔国际公司 受损电介质材料和电介质膜的修复和恢复
US20040145030A1 (en) * 2003-01-28 2004-07-29 Meagley Robert P. Forming semiconductor structures
JP4588304B2 (ja) * 2003-08-12 2010-12-01 Azエレクトロニックマテリアルズ株式会社 コーティング組成物、およびそれを用いて製造した低誘電シリカ質材料
US8475666B2 (en) 2004-09-15 2013-07-02 Honeywell International Inc. Method for making toughening agent materials
US7678712B2 (en) 2005-03-22 2010-03-16 Honeywell International, Inc. Vapor phase treatment of dielectric materials
US7500397B2 (en) 2007-02-15 2009-03-10 Air Products And Chemicals, Inc. Activated chemical process for enhancing material properties of dielectric films
WO2010064306A1 (ja) 2008-12-03 2010-06-10 富士通株式会社 半導体装置の製造方法
CN102487004A (zh) * 2010-12-01 2012-06-06 中芯国际集成电路制造(上海)有限公司 利用化学气相淀积填充隔离槽的方法
CN103871961B (zh) 2012-12-17 2017-08-25 中芯国际集成电路制造(上海)有限公司 互连结构及其制造方法
US8871639B2 (en) 2013-01-04 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacture thereof
US10461406B2 (en) 2017-01-23 2019-10-29 Microsoft Technology Licensing, Llc Loop antenna with integrated proximity sensing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4885262A (en) * 1989-03-08 1989-12-05 Intel Corporation Chemical modification of spin-on glass for improved performance in IC fabrication
DE3933908A1 (de) * 1989-10-11 1991-04-25 Telefunken Electronic Gmbh Verfahren zur herstellung einer integrierten mos-halbleiteranordnung
JPH03152957A (ja) * 1989-11-09 1991-06-28 Sony Corp 半導体装置の製造方法
DE4135810C2 (de) * 1990-10-30 2000-04-13 Mitsubishi Electric Corp Halbleitereinrichtung mit einem Zwischenschichtisolierfilm und Verfahren zu deren Herstellung
JP2640174B2 (ja) * 1990-10-30 1997-08-13 三菱電機株式会社 半導体装置およびその製造方法
US5219791A (en) * 1991-06-07 1993-06-15 Intel Corporation TEOS intermetal dielectric preclean for VIA formation
EP0560617A3 (en) * 1992-03-13 1993-11-24 Kawasaki Steel Co Method of manufacturing insulating film on semiconductor device and apparatus for carrying out the same
US5576247A (en) * 1992-07-31 1996-11-19 Matsushita Electric Industrial Co., Ltd. Thin layer forming method wherein hydrophobic molecular layers preventing a BPSG layer from absorbing moisture

Also Published As

Publication number Publication date
KR950007023A (ko) 1995-03-21
EP0643421B1 (en) 2000-05-31
CN1050694C (zh) 2000-03-22
DE69424728T2 (de) 2000-09-28
US5950101A (en) 1999-09-07
EP0643421A2 (en) 1995-03-15
CN1109216A (zh) 1995-09-27
EP0643421A3 (en) 1995-05-24
JPH0766287A (ja) 1995-03-10
US5723909A (en) 1998-03-03
DE69424728D1 (de) 2000-07-06

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