JPWO2023233910A5 - - Google Patents

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JPWO2023233910A5
JPWO2023233910A5 JP2024524263A JP2024524263A JPWO2023233910A5 JP WO2023233910 A5 JPWO2023233910 A5 JP WO2023233910A5 JP 2024524263 A JP2024524263 A JP 2024524263A JP 2024524263 A JP2024524263 A JP 2024524263A JP WO2023233910 A5 JPWO2023233910 A5 JP WO2023233910A5
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semiconductor device
dimensional structure
substrate
longitudinal direction
substrate surface
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JP2024524263A
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Japanese (ja)
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JPWO2023233910A1 (https=
JP7785399B2 (ja
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Priority claimed from PCT/JP2023/017094 external-priority patent/WO2023233910A1/ja
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JP2024524263A 2022-05-30 2023-05-01 半導体装置、その用途、およびその製造方法 Active JP7785399B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2022087822 2022-05-30
JP2022087822 2022-05-30
JP2022206599 2022-12-23
JP2022206599 2022-12-23
PCT/JP2023/017094 WO2023233910A1 (ja) 2022-05-30 2023-05-01 半導体装置、その用途、およびその製造方法

Publications (3)

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JPWO2023233910A1 JPWO2023233910A1 (https=) 2023-12-07
JPWO2023233910A5 true JPWO2023233910A5 (https=) 2024-11-26
JP7785399B2 JP7785399B2 (ja) 2025-12-15

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JP2024524263A Active JP7785399B2 (ja) 2022-05-30 2023-05-01 半導体装置、その用途、およびその製造方法

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JP (1) JP7785399B2 (https=)
WO (1) WO2023233910A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024262383A1 (ja) * 2023-06-19 2024-12-26 パナソニックIpマネジメント株式会社 エピタキシャルウェハ、β-Ga2O3系デバイス、及び、β-Ga2O3系デバイスの製造方法
CN119433708B (zh) * 2024-10-15 2026-01-16 南京大学 一种抑制(001)面β-Ga2O3外延生长各向异性的方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6137197B2 (ja) * 2012-12-17 2017-05-31 三菱化学株式会社 窒化ガリウム基板、および、窒化物半導体結晶の製造方法
JP2016031953A (ja) * 2014-07-25 2016-03-07 株式会社タムラ製作所 半導体素子及びその製造方法、半導体基板、並びに結晶積層構造体
WO2019191465A1 (en) * 2018-03-28 2019-10-03 Cornell University VERTICAL GALLIUM OXIDE (Ga2O3) POWER FETS
CN112331553B (zh) * 2019-07-16 2024-04-05 中国科学院苏州纳米技术与纳米仿生研究所 纳米线单片外延集成结构、制作方法与应用

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