JPWO2022097424A5 - - Google Patents

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Publication number
JPWO2022097424A5
JPWO2022097424A5 JP2022560686A JP2022560686A JPWO2022097424A5 JP WO2022097424 A5 JPWO2022097424 A5 JP WO2022097424A5 JP 2022560686 A JP2022560686 A JP 2022560686A JP 2022560686 A JP2022560686 A JP 2022560686A JP WO2022097424 A5 JPWO2022097424 A5 JP WO2022097424A5
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JP
Japan
Prior art keywords
inductor
circuit board
signal transmission
chip
compensating section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2022560686A
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English (en)
Japanese (ja)
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JP7456516B2 (ja
JPWO2022097424A1 (https=
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Priority claimed from PCT/JP2021/037463 external-priority patent/WO2022097424A1/ja
Publication of JPWO2022097424A1 publication Critical patent/JPWO2022097424A1/ja
Publication of JPWO2022097424A5 publication Critical patent/JPWO2022097424A5/ja
Application granted granted Critical
Publication of JP7456516B2 publication Critical patent/JP7456516B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2022560686A 2020-11-04 2021-10-08 信号電源分離回路が構成される多層回路基板 Active JP7456516B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020184488 2020-11-04
JP2020184488 2020-11-04
PCT/JP2021/037463 WO2022097424A1 (ja) 2020-11-04 2021-10-08 信号電源分離回路が構成される多層回路基板

Publications (3)

Publication Number Publication Date
JPWO2022097424A1 JPWO2022097424A1 (https=) 2022-05-12
JPWO2022097424A5 true JPWO2022097424A5 (https=) 2023-05-11
JP7456516B2 JP7456516B2 (ja) 2024-03-27

Family

ID=81457153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022560686A Active JP7456516B2 (ja) 2020-11-04 2021-10-08 信号電源分離回路が構成される多層回路基板

Country Status (3)

Country Link
US (1) US12309914B2 (https=)
JP (1) JP7456516B2 (https=)
WO (1) WO2022097424A1 (https=)

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0729658Y2 (ja) * 1987-03-02 1995-07-05 株式会社村田製作所 回路基板
JPH0371703A (ja) * 1989-08-11 1991-03-27 Hitachi Ltd 多層基板の接続方法
JPH06350312A (ja) * 1993-06-04 1994-12-22 Nec Corp 同軸コネクタと多層プリント基板の接続構造
JP3661326B2 (ja) * 1997-01-16 2005-06-15 松下電器産業株式会社 印刷配線基板装置
JP3471679B2 (ja) * 1999-10-15 2003-12-02 日本電気株式会社 プリント基板
JP2004129053A (ja) * 2002-10-04 2004-04-22 Mitsubishi Electric Corp Dcブロック回路および通信装置
JP2007123740A (ja) * 2005-10-31 2007-05-17 Sony Corp フレキシブル基板、光送受信モジュール及び光送受信装置
EP2209172A1 (en) * 2009-01-15 2010-07-21 3M Innovative Properties Company Telecommunications Jack with a Multilayer PCB
JP2010200223A (ja) * 2009-02-27 2010-09-09 Seiko Epson Corp 電子機器、電子機器の制御方法、リモートコントローラー、リモートコントローラーの制御方法及びプログラム
US8138734B2 (en) * 2009-04-06 2012-03-20 Monolithic Power Systems, Inc. Accurate current limit for peak current mode DC-DC converter
US9706642B2 (en) * 2010-08-27 2017-07-11 Avago Technologies General Ip (Singapore) Pte. Ltd. Method and device for differential signal channel length compensation in electronic system
JP2014171154A (ja) 2013-03-05 2014-09-18 Nippon Telegr & Teleph Corp <Ntt> マイクロストリップ線路
JP6226600B2 (ja) * 2013-07-18 2017-11-08 キヤノン株式会社 プリント回路板
JP6398978B2 (ja) * 2013-08-20 2018-10-03 株式会社村田製作所 高周波モジュール
US9780662B1 (en) * 2015-05-15 2017-10-03 Maxim Integrated Products, Inc. Method for portable sensor-less DC-DC converter control loops
US10158339B2 (en) * 2015-12-11 2018-12-18 Intel Corporation Capacitive compensation structures using partially meshed ground planes
US20190372542A1 (en) * 2017-02-06 2019-12-05 Mitsubishi Electric Corporation Noise filter
US10418994B1 (en) * 2017-07-12 2019-09-17 Xilinx, Inc. Circuit for and method of extending the bandwidth of a termination block
CN112119489B (zh) * 2018-08-21 2024-03-12 Ngk电子器件株式会社 布线基板、封装体及模块
JP7133486B2 (ja) * 2019-01-16 2022-09-08 日立Astemo株式会社 信号伝送装置、信号伝送システム

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