JPWO2019078367A1 - メモリスタ及びそれを用いたニューラルネットワーク - Google Patents
メモリスタ及びそれを用いたニューラルネットワーク Download PDFInfo
- Publication number
- JPWO2019078367A1 JPWO2019078367A1 JP2019548836A JP2019548836A JPWO2019078367A1 JP WO2019078367 A1 JPWO2019078367 A1 JP WO2019078367A1 JP 2019548836 A JP2019548836 A JP 2019548836A JP 2019548836 A JP2019548836 A JP 2019548836A JP WO2019078367 A1 JPWO2019078367 A1 JP WO2019078367A1
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- memristor
- neural network
- voltage
- resistance state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000013528 artificial neural network Methods 0.000 title claims description 27
- 229910052733 gallium Inorganic materials 0.000 claims abstract description 13
- 229910052718 tin Inorganic materials 0.000 claims abstract description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 11
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 11
- 239000001301 oxygen Substances 0.000 claims abstract description 11
- 230000007704 transition Effects 0.000 claims abstract description 7
- 230000000946 synaptic effect Effects 0.000 claims description 28
- 210000002569 neuron Anatomy 0.000 claims description 17
- 239000010409 thin film Substances 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 2
- 230000015654 memory Effects 0.000 abstract description 13
- 239000000758 substrate Substances 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000010408 film Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 238000002474 experimental method Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 4
- 210000000225 synapse Anatomy 0.000 description 4
- 238000000059 patterning Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000000926 neurological effect Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229920006290 polyethylene naphthalate film Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/065—Analogue means
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/003—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/82—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays the switching components having a common active material layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/009—Write using potential difference applied between cell electrodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/10—Resistive cells; Technology aspects
- G11C2213/15—Current-voltage curve
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/53—Structure wherein the resistive material being in a transistor, e.g. gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/79—Array wherein the access device being a transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- General Health & Medical Sciences (AREA)
- Theoretical Computer Science (AREA)
- Molecular Biology (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Neurology (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Biophysics (AREA)
- Mathematical Physics (AREA)
- Computational Linguistics (AREA)
- Software Systems (AREA)
- Evolutionary Computation (AREA)
- Artificial Intelligence (AREA)
- Data Mining & Analysis (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
2 第1電極
3 第2電極
4 メモリスタ層
5 基板
6 メモリスタアレイ
7 ニューロン回路
8 シナプス素子
9 ニューラルネットワーク
10 第1方向制御回路
11 第2方向制御回路
12 薄膜トランジスタ
13 ドレイン電極
14 ソース電極
15 ゲート電極
16 チャネル層
17 ゲート絶縁膜
Claims (7)
- 第1電極と、
第2電極と、
前記第1電極と前記第2電極との間に配置され、Ga、Sn及び酸素の元素を有する酸化物のメモリスタ層と
を備え、
前記第2電極に対して前記第1電極に正又は負の電圧が印加されると電流が流れ、データセット電圧値の電圧が印加されると高抵抗状態から低抵抗状態に遷移し、前記データセット電圧値と正負逆のデータリセット電圧値の電圧が印加されると低抵抗状態から高抵抗状態に遷移することを特徴とするメモリスタ。 - 請求項1に記載のメモリスタにおいて、
前記酸化物は非晶質酸化物であることを特徴とするメモリスタ。 - 請求項1又は2に記載のメモリスタにおいて、
前記第1電極及び/又は前記第2電極は、アルミニウムの堆積により形成されたものであることを特徴とするメモリスタ。 - 複数個のニューロン回路と複数個のシナプス素子とを備えるニューラルネットワークであって、
該シナプス素子は、請求項1〜3のいずれか1項に記載のメモリスタを含むことを特徴とするニューラルネットワーク。 - 複数個のニューロン回路と複数個のシナプス素子とを備えるニューラルネットワークであって、
該ニューロン回路は、請求項1〜3のいずれか1項に記載のメモリスタを含むことを特徴とするニューラルネットワーク。 - 請求項4又は5に記載のニューラルネットワークにおいて、
前記複数個のシナプス素子は、マトリクス状に配置され、そのうち第1方向に配置された前記複数個のシナプス素子では前記第1電極又は前記第2電極の一方が共通に接続され、かつ、第2方向に配置された前記複数個のシナプス素子では前記第1電極又は前記第2電極の他方が共通に接続されており、
前記複数個のニューロン回路の各々は、共通に接続された前記第1電極又は前記第2電極の一方に接続され、共通に接続された前記第1電極又は前記第2電極の他方に接続されることを特徴とするニューラルネットワーク。 - 請求項4〜6のいずれか1項に記載のニューラルネットワークにおいて、
前記ニューロン回路は、薄膜トランジスタを有しており、
該薄膜トランジスタは、
ドレイン電極と、
ソース電極と、
ゲート電極と、
該ドレイン電極と該ソース電極の間及び該ゲート電極と該ソース電極の間に電圧が印加されると、それらの電圧に応じた電流が該ドレイン電極と該ソース電極の間に流れるチャネル層と
を備え、
該チャネル層は、前記メモリスタ層と同じ層を用いていることを特徴とするニューラルネットワーク。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017202437 | 2017-10-19 | ||
JP2017202437 | 2017-10-19 | ||
PCT/JP2018/039111 WO2019078367A1 (ja) | 2017-10-19 | 2018-10-19 | メモリスタ及びそれを用いたニューラルネットワーク |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2019078367A1 true JPWO2019078367A1 (ja) | 2020-11-12 |
JP7197866B2 JP7197866B2 (ja) | 2022-12-28 |
Family
ID=66173710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019548836A Active JP7197866B2 (ja) | 2017-10-19 | 2018-10-19 | メモリスタ及びそれを用いたニューラルネットワーク |
Country Status (3)
Country | Link |
---|---|
US (1) | US11276820B2 (ja) |
JP (1) | JP7197866B2 (ja) |
WO (1) | WO2019078367A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2022080229A1 (ja) * | 2020-10-16 | 2022-04-21 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0363996A (ja) * | 1989-08-01 | 1991-03-19 | Casio Comput Co Ltd | 薄膜トランジスタによるプログラマブル連想メモリ |
US20120043517A1 (en) * | 2010-08-17 | 2012-02-23 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor storage device |
US20120109866A1 (en) * | 2010-10-29 | 2012-05-03 | International Business Machines Corporation | Compact cognitive synaptic computing circuits |
US20160379110A1 (en) * | 2015-06-29 | 2016-12-29 | International Business Machines Corporation | Neuromorphic processing devices |
US20180013061A1 (en) * | 2016-07-08 | 2018-01-11 | Toshiba Memory Corporation | Memory device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011086696A (ja) | 2009-10-14 | 2011-04-28 | Panasonic Corp | 電子部品実装装置 |
RU2472254C9 (ru) | 2011-11-14 | 2013-06-10 | Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Московский физико-технический институт (государственный университет)" (МФТИ) | Мемристор на основе смешанного оксида металлов |
US8779409B2 (en) * | 2012-09-28 | 2014-07-15 | Hewlett-Packard Development Company, L.P. | Low energy memristors with engineered switching channel materials |
US8937829B2 (en) * | 2012-12-02 | 2015-01-20 | Khalifa University of Science, Technology & Research (KUSTAR) | System and a method for designing a hybrid memory cell with memristor and complementary metal-oxide semiconductor |
JP6162822B2 (ja) | 2013-01-14 | 2017-07-12 | フラウンホーファー−ゲゼルシャフト・ツール・フェルデルング・デル・アンゲヴァンテン・フォルシュング・アインゲトラーゲネル・フェライン | 非対称メモリスタ |
FR3003062B1 (fr) * | 2013-03-05 | 2015-06-05 | Univ Bordeaux 1 | Organe a neurone artificiel et memristor |
-
2018
- 2018-10-19 US US16/756,993 patent/US11276820B2/en active Active
- 2018-10-19 JP JP2019548836A patent/JP7197866B2/ja active Active
- 2018-10-19 WO PCT/JP2018/039111 patent/WO2019078367A1/ja active Application Filing
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0363996A (ja) * | 1989-08-01 | 1991-03-19 | Casio Comput Co Ltd | 薄膜トランジスタによるプログラマブル連想メモリ |
US20120043517A1 (en) * | 2010-08-17 | 2012-02-23 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor storage device |
JP2012043896A (ja) * | 2010-08-17 | 2012-03-01 | Toshiba Corp | 不揮発性半導体記憶装置 |
US20120109866A1 (en) * | 2010-10-29 | 2012-05-03 | International Business Machines Corporation | Compact cognitive synaptic computing circuits |
WO2012055592A1 (en) * | 2010-10-29 | 2012-05-03 | International Business Machines Corporation | Compact cognitive synaptic computing circuits |
JP2013546064A (ja) * | 2010-10-29 | 2013-12-26 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 小型コグニティブ・シナプス・コンピューティング回路のためのシステムおよび方法 |
US20160379110A1 (en) * | 2015-06-29 | 2016-12-29 | International Business Machines Corporation | Neuromorphic processing devices |
WO2017001956A1 (en) * | 2015-06-29 | 2017-01-05 | International Business Machines Corporation | Neuromorphic processing devices |
JP2018524698A (ja) * | 2015-06-29 | 2018-08-30 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | ニューロモーフィック処理デバイス |
US20180013061A1 (en) * | 2016-07-08 | 2018-01-11 | Toshiba Memory Corporation | Memory device |
JP2018006696A (ja) * | 2016-07-08 | 2018-01-11 | 東芝メモリ株式会社 | 記憶装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2019078367A1 (ja) | 2019-04-25 |
US11276820B2 (en) | 2022-03-15 |
JP7197866B2 (ja) | 2022-12-28 |
US20210036223A1 (en) | 2021-02-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10985318B2 (en) | Memristor device and a method of fabrication thereof | |
US9214631B2 (en) | Resistive RAM, method for fabricating the same, and method for driving the same | |
US10236061B2 (en) | Resistive random access memory having charge trapping layer, manufacturing method thereof, and operation thereof | |
JP2007311798A (ja) | 酸素欠乏金属酸化物を利用した不揮発性メモリ素子及びその製造方法 | |
CN1953230A (zh) | 包括纳米点的非易失性存储器件及其制造方法 | |
CN101816070A (zh) | 电流抑制元件、存储元件及它们的制造方法 | |
JP2008022007A (ja) | 可変抵抗物質を含む不揮発性メモリ素子及びその製造方法 | |
KR101811108B1 (ko) | 부도체-도체 전이현상을 이용한 뉴런 소자를 포함한 고집적 뉴로모픽 시스템 및 고집적 뉴로모픽 회로 | |
JP6544555B2 (ja) | 抵抗変化型素子の製造方法 | |
KR101105981B1 (ko) | 저항변화 메모리 소자 및 이의 제조방법 | |
JP2018538701A5 (ja) | ||
CN102738388A (zh) | 具有忆阻器特性的半导体器件及其实现多级存储的方法 | |
KR20150094387A (ko) | 초박막 기반 저전력으로 구동되는 멤리스터 | |
JP7197866B2 (ja) | メモリスタ及びそれを用いたニューラルネットワーク | |
Bai et al. | Homo-layer hafnia-based memristor with large analog switching window | |
US20170250223A1 (en) | A resistive random-access memory in printed circuit board | |
US20140374693A1 (en) | Varied multilayer memristive device | |
JP5266632B2 (ja) | Mim素子および電子装置、電子装置の製造方法 | |
TWI533409B (zh) | 非揮發性記憶體及其製造方法 | |
KR100785509B1 (ko) | ReRAM 소자 및 그 제조 방법 | |
JP2018056460A (ja) | トンネル接合素子及び不揮発性メモリ素子 | |
TW200820257A (en) | Bistable resistance random access memory structures with multiple memory layers and multilevel memory states | |
JP5583738B2 (ja) | 抵抗変化型メモリ | |
US20220367802A1 (en) | Resistive random-access memory devices with multi-component electrodes | |
TWI610429B (zh) | 互補式電阻式記憶體之製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200805 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20211015 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20211015 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20220727 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220920 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20221118 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20221208 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7197866 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |