JPS6482568A - Manufacture of field-effect transistor - Google Patents

Manufacture of field-effect transistor

Info

Publication number
JPS6482568A
JPS6482568A JP23879687A JP23879687A JPS6482568A JP S6482568 A JPS6482568 A JP S6482568A JP 23879687 A JP23879687 A JP 23879687A JP 23879687 A JP23879687 A JP 23879687A JP S6482568 A JPS6482568 A JP S6482568A
Authority
JP
Japan
Prior art keywords
layer
gate electrode
photo resist
insulating film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23879687A
Other languages
Japanese (ja)
Inventor
Hiromichi Kuroda
Sadao Takechi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23879687A priority Critical patent/JPS6482568A/en
Publication of JPS6482568A publication Critical patent/JPS6482568A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the contamination due to a photo resist layer buried in the hole part of an overhang structure, by adopting an overhang structure composed of different material films, and coating a gate electrode indispensable to an element and the inner surface of the overhang structure with a third insulating film. CONSTITUTION:A silicon dioxide layer 3 and a first silicon nitride layer 4 are spread on the surface of a semiinsulative semiconductor substrate 1 composed of GaAs on which an operating layer 2 is formed. After a photo resist 6 is formed on the surface of the above laminated body, an aperture part 5 is arranged at a part of the photo resist layer 6 corresponding with the position of a gate electrode of the semiconductor substrate 1. Then an overhang part 10 wherein a part of the aperture 5 is expanded in the transversal direction is formed. In order to arrange a recessed part 11 on the surface of the exposed semiconductor substrate 1, etching is slightly performed and Al is deposited for a gate electrode. Silicon nitride, silicon oxide, etc., are applicable to a third insulating film 8. The hole part of a laminated structure is filled with photo resist 9, and the third insulating film 8 and the Al layer for gate electrode metal are eliminate by isotropic etching.
JP23879687A 1987-09-25 1987-09-25 Manufacture of field-effect transistor Pending JPS6482568A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23879687A JPS6482568A (en) 1987-09-25 1987-09-25 Manufacture of field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23879687A JPS6482568A (en) 1987-09-25 1987-09-25 Manufacture of field-effect transistor

Publications (1)

Publication Number Publication Date
JPS6482568A true JPS6482568A (en) 1989-03-28

Family

ID=17035412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23879687A Pending JPS6482568A (en) 1987-09-25 1987-09-25 Manufacture of field-effect transistor

Country Status (1)

Country Link
JP (1) JPS6482568A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04252031A (en) * 1991-01-28 1992-09-08 Nec Corp Insulating film and its formation, formation of insulating-film pattern and manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04252031A (en) * 1991-01-28 1992-09-08 Nec Corp Insulating film and its formation, formation of insulating-film pattern and manufacture of semiconductor device

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