JPH04252031A - Insulating film and its formation, formation of insulating-film pattern and manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide the following when an insulating-film opening pattern such as a contact hole or the like is formed: an insulating film which can control its opening shape so as to be a desired shape; its formation method; and a pattern-formation method using the insulating film. CONSTITUTION:When an insulating film is formed, a silicon nitride film is formed by a plasma chemical vapor growth operation. At this time, the insulating film is formed while the flow rate of ammonia out of gases to be intrduced is being changed with reference to the flow rate of silane in the example of the figure. As shown in the figure, it is possible to form the insulating film in which an etch rate is changed in the thickness direction of the insulating film. When the film is used, the insulating film having a desired shape can be formed after an etching operation.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a method for forming an insulating film and pattern for a semiconductor device, a pattern forming method for forming electrodes and wiring using an insulating film, and a manufacturing method for semiconductor devices using this pattern forming method. Regarding the method.

0002

BACKGROUND OF THE INVENTION Currently, a method described in Japanese Patent Application Laid-Open No. 2-122628 entitled "Method for Manufacturing a Semiconductor Device" is known as one of the methods for forming an opening pattern, such as a contact hole, using an insulating film. ing. The formation method described in the above publication is shown in FIGS. 10(a) to 10(b).

As shown in FIG. 10(a), a base conductive film 7
An insulating film 76 is formed on the insulating film 76, and then a resist 77 is coated on the insulating film 76 and a contact hole 78 is patterned. Then reactive ion etching (RI)
E) Using a device, perform anisotropic etching to obtain a substantially vertical shape. Next, a second etching process is performed to process only the upper part of the contact hole 78 into a tapered shape under quasi-anisotropic etching conditions.
) is processed into a tapered shape 79 as shown in FIG.

0004

[Problems to be Solved by the Invention] In the above-mentioned conventional technology, by selectively increasing only the area above the contact hole, it is possible to improve the coverage of the conductive film to be deposited, and further improve the coverage of the conductive film to be deposited. By not increasing the bottom area, electrical contact, leakage, and interference with other wiring layers can be avoided. However, in this conventional technique, since the bottom of the contact hole has vertical sidewalls, the coverage of the conductive film to be deposited is not improved as the area of the bottom of the contact hole becomes smaller. In order to improve this coverage, it is necessary to bring the starting position of the tapered shape closer to the underlying conductive film.However, as described in the above publication, the vertical sidewall of the bottom of this contact hole Furthermore, the taper formed by quasi-anisotropic etching is forced to remain in order to prevent the taper from extending to the lower part of the insulating film and increasing the area of the bottom surface. In addition, the tapered shape is
Because it uses dry etching, it is linear,
It is impossible to control the shape so that it gradually changes upward in a convex manner. Furthermore, there is a correlation between the taper start position and the opening size of the upper part of the contact hole, and it is impossible to fix the taper start position and make the contact hole opening size variable.

An object of the present invention is to provide an insulating film, a method for forming the same, and a method for forming the insulating film, which can control the opening shape to a desired shape when forming an insulating film opening pattern such as a contact hole. An object of the present invention is to provide a pattern forming method and a semiconductor device manufacturing method using the method.

[0006]

[Means for Solving the Problems] The insulating film of the present invention is characterized in that, in the insulating film formed on a substrate, the etching rate of the etching gas or etching solution changes in the thickness direction of the insulating film. do.

The insulating film forming method of the present invention also includes controlling the flow rate of gases other than the carrier gas among the raw material gases used in the step of forming the insulating film on the substrate during the insulating film formation. The feature is that the etching rate of the etching gas or etching solution is changed in the thickness direction of the insulating film by changing the etching rate.

The insulating film pattern forming method according to the present invention includes:
a step of coating and forming a photoresist on an insulating film formed on a substrate and having an etching rate varying in the thickness direction; a step of exposing the insulating film by performing exposure and development;
The method is characterized in that it includes at least the step of removing the exposed insulating film by wet etching using the remaining photoresist as a mask to expose the substrate.

Alternatively, a step of coating a photoresist on an insulating film formed on a substrate and having an etching rate varying in the thickness direction, a step of exposing the insulating film by exposure and development, and a step of exposing the insulating film, and removing the remaining The method is characterized in that it includes at least the steps of removing the exposed insulating film portion by directional etching using a photoresist as a mask, and then removing a portion of the exposed insulating film by wet etching.

Further, the method for manufacturing a semiconductor device according to the present invention includes the step of forming a conductive film on a part of the substrate, and the step of controlling the growth gas so that the etching rate of the insulating film with respect to the etching solution increases as the distance from the substrate increases. A step of forming an insulating film by controlling the composition using a CVD method, a step of forming an opening in the upper part of the conductive film by using a resist as a mask by a lithography method, and a step of forming an insulating film near perpendicularly below the opening by directional etching. A contact hole is formed by forming an opening in the insulating film having a sidewall, and etching the insulating film with the etching solution to form an opening in which the upper part of the opening is larger than the lower part. It is characterized by the formation of

Alternatively, the method for manufacturing a semiconductor device according to the present invention includes the steps of forming a semiconductor layer including at least an active layer on a semiconductor substrate, and forming a source electrode and a source electrode on a part of the semiconductor layer.
A process of forming a drain electrode, a process of forming an insulating film by CVD method by controlling the composition of the growth gas so that the etching rate of the insulating film with respect to the etching solution becomes smaller as the distance from the substrate increases, and a process of forming a resist by a lithography method. forming an opening as a mask; forming an opening in the insulating film with a nearly vertical sidewall below the opening by directional etching; and etching the insulating film with the etching solution to form an opening in the opening. A step of forming an opening having a shape in which the upper dimension is smaller than the lower part, a step of forming a gate metal film by vapor deposition, a step of forming a resist in a region including the opening, and removing the metal film other than the gate part. and a step of removing the insulating film and the resist, respectively.

0012

[Operation] In the present invention, among the gases used in the process of forming an insulating film on a substrate, the flow rate of gases other than carrier gas is changed during the insulating film formation, and the gas flow rate is changed in the thickness direction of the insulating film. An insulating film is formed by changing the etching rate of an etching gas or an etching solution. This allows the shape to be freely controlled by etching, so that the cross section of the insulating film opening after etching can be processed into a desired shape.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described using a method of forming a silicon nitride (SiN) insulating film as an example.

[0014] A silicon nitride film was formed by plasma chemical vapor deposition (PCVD) at a substrate temperature of 250°C and a vacuum level of 1.0 Torr.
Silane (SiH4) 10.2 sccm, nitrogen (N2
) 100 sccm and a power of 200 W, the amount of film deposited per unit time is a function of the flow rate of ammonia (NH3), and the amount of film deposited per unit time as a function of the flow rate of ammonia (NH3).
The etching rate for HF) with 100cc added and 100BHF) varies. Figure 1 shows the NH of SiH4
FIG. 3 is a diagram showing the relationship between the flow rate ratio to 3 and the deposition growth rate and etching rate of a silicon nitride film. From this, NH3
When the flow rate of is changed, the amount of deposition per unit time is 1
8-20nm/min. limited to a range of 100
As the NH3 flow rate increases, the etching rate for BHF decreases to 20 nm/min. from 170nm
/min. increase to. Based on this result, under the above conditions, 35 nm/min. Etching rate T (M) (μm/m
in. ) and the SiH4/NH3 flow rate ratio M (%) is found to be given by the following equation (1).

T(M)=(48.2M−324)×10−4
(1)
Therefore, for example, in order to make the cross section of the insulating film after etching have an undercut shape (the opening size in the upper part of the insulating film is smaller than the dimension in the lower part of the insulating film), the etching rate for 100BHF on the upper part of the insulating film should be low. Further, the flow rate may be controlled during the formation of the insulating film so that the etching rate becomes high in the lower part of the insulating film. Therefore, if we try to change the etching rate Tz (L) of the insulating film in a quadratic manner, where the growth thickness of the insulating film is R (μm) and the position in the insulating film measured from the substrate is L, we can use the following formula: It is only necessary to change the flow rate ratio M, that is, the NH3 flow rate, during the growth of the insulating film so as to satisfy the relationship given by (2) and the equation (1).

[0016]

[Math 1]

[0017]

[0018] Here, Tz(0)=0.17μm/min
．． , Tz(R)=0.02μm/min. And also,
Assuming a growth rate of 19 nm/min, SiH4
The relationship between the /NH3 flow rate ratio M, the insulating film growth time, and the growth thickness R, and the relationship between the position L from the substrate in the thickness direction and the etching rate Tz (L) are as shown in FIG. Therefore, Figure 2
By changing the SiH4 /NH3 flow rate ratio M with respect to time as shown in
It is possible to form an insulating film whose etching rate is different from that of BHF.

As an example of a process using this insulating film, a method for forming an undercut-shaped insulating film opening pattern will be described with reference to FIG. FIG. 3 is a diagram showing the manufacturing process. As shown in FIG. 3(a), a silicon nitride insulating film 32 having an etching rate satisfying formulas (1) and (2) is deposited on a substrate 31 to a thickness of 0.3 μm. Then, after coating and forming a photoresist 33 (for example, AZ-1370 manufactured by Hoechst), a desired pattern is exposed on the photoresist 33 and developed, as shown in FIG. 3(b).
A resist opening 34 is formed. Next, by performing etching with 100BHF, an undercut-shaped insulating film opening pattern as shown in FIG. 3C can be formed in an etching time of 4 minutes.

[0020] Also, reactive ion etching and 100BH
An example of forming a contact hole by using F in combination will be described with reference to FIGS. 4 and 5(a) to 5(c) and FIG. 6. In order to make the change in etching rate for 100BHF of the silicon nitride insulating film in this example larger at the upper part of the insulating film and smaller at the lower part of the insulating film, the following formula (3) is used instead of formula (2) to change the etching rate. Tz (L) (μm/min
).

[0021] Tz(L)=1.67L2 +0.02

(3) From formula (1) and formula (3), S as shown in Figure 4 is obtained.
The relationship between the iH4/NH3 flow rate ratio M, the growth time, and the growth thickness R is obtained.

FIGS. 5 and 6 are diagrams showing steps of an insulating film pattern forming method. As shown in FIG. 5(a), the substrate 51
A conductive film 56 (for example, gold (Au) with a thickness of 0
．． A silicon nitride insulating film 52 with a thickness of 0.3 μm is formed on the silicon nitride insulating film 52 (2 μm thick) under the conditions shown in FIG. As shown in b), after exposing the resist 53 above the conductive film 56 to a desired pattern,
Developing is performed to form resist openings 54. Next, Figure 5 (
As shown in c), a silicon nitride insulating film opening 55 having a nearly vertical sidewall is formed below the resist opening 54 by reactive ion etching (eg, fluorine tetrachloride CF4). Next, by etching with 100BHF, an insulator suitable for a contact hole with an overcut shape (the upper dimension of the insulating film is larger than the lower dimension of the insulating film) as shown in FIG. 6, which does not have vertical sidewalls in the opening, is formed. It is possible to form a film pattern. In this case, the portion of the silicon nitride insulating film 5 that is in contact with the conductive film 56
The etching rate for 100BHF of 2 is 20nm
/min. It is possible to set it as follows, and it is possible to suppress the expansion of the lower part of the insulating film opening.

Next, as another embodiment of the present invention, FIG.
Using the process cross-sectional views of FIGS. 8 and 9, a GaAs Schottky field effect transistor (GaAs MESFET) is taken as an example of a semiconductor device in which a gate electrode is formed using the silicon nitride insulating film pattern forming method shown in FIG. The manufacturing method will be explained. As shown in FIG. 7(a), semi-insulating GaAs
A source is placed on a GaAs epitaxial wafer 60 on which an n-GaAs layer 62 is epitaxially grown on a substrate 61.
A drain electrode 64 and a silicon nitride insulating film 65 (eg, 0.3 μm thick) whose etching rate changes in the direction of the insulating film thickness as described by equations (1) and (2) are formed. Next, as shown in FIG. 7B, a resist 66 is applied and formed on the insulating film 65, and exposed to light to form a resist opening 67 having a desired opening width. Then, as shown in FIG. 7C, a portion of the insulating film 65 is removed through the resist opening 67 by reactive ion etching. Next, the exposed insulating film 6 is removed using 100BHF.
5 is etched to form an insulating film opening pattern 68 having an undercut shape as shown in FIG. 8(a).

Next, after removing the remaining resist 66 by organic cleaning, ashing treatment, or resist stripping solution, the n-GaAs layer is recess-etched to set the current value to a desired value. Next, as shown in FIG. 8B, a gate metal film (for example, aluminum) 69 is formed by vapor deposition, and then a resist (for example, A manufactured by Hoechst Co., Ltd.) is formed.
Z-1350) 70 is applied to the entire surface, and resist 70 is also poured into the insulating film opening pattern 68. Next, Figure 8 (
As shown in c), exposure and development is carried out so that the resist 70 remains in the region including the insulating film opening pattern 68, and then unnecessary metal film 69 on the insulating film 68 is removed with phosphoric acid.
By removing the insulating film 68 using fluorine tetrachloride (CF4), a gate electrode 71 is formed as shown in FIG.

By using this manufacturing method, the resistance of the aluminum gate, which was conventionally formed by resist lift-off, is reduced to 720% by gas release from the resist.
The resistance was improved from Ω・mm to 360Ω・mm, which is half of the conventional value. Although this embodiment has been described following the GaAs MESFET, it goes without saying that the same applies to the gate formation process of the two-dimensional electron gas FET. Furthermore, it can also be applied to semiconductor devices having electrodes with such fine patterns.

In the embodiments of the present invention described above with reference to FIGS. 1 to 9, silicon nitride is used as an example of the insulating film, and the flow rate of ammonia is varied, but silicon dioxide (S
It is also possible to form an insulating film with similar properties by changing the flow rate of N2O during the formation of iO2), and the change in etching rate due to the change in flow rate is limited only to the formation of a silicon nitride insulating film. It is clear that this is not the case. Furthermore, among the conditions for forming the silicon nitride insulating film used in the examples, the temperature, power, pressure, and flow rate are only examples, and the etching rate can be varied in the thickness direction of the insulating film even under other forming conditions. The following insulating film formation conditions are possible and are not limited to the examples. Furthermore, although it has been assumed that the change in etching rate is quadratic in the thickness direction, it goes without saying that it is possible to have an arbitrary function shape. Furthermore, it is clear that the resists and metal films used in the examples are not limited to those used in the examples as long as they can be used in the process.

[0027]

According to the present invention, since the etching rate can be varied in the thickness direction of the insulating film, it is possible to form a desired insulating film and its opening pattern. When this method is applied to forming contact holes, it becomes possible to control the shape to a desired shape. Furthermore, when used to form gate electrodes of semiconductor devices, gate resistance can be reduced to less than half, and good devices can be manufactured.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the relationship between the flow rate ratio for SiH4/NH3 and the deposition growth rate and etching rate of a silicon nitride film.

FIG. 2 is a diagram showing the relationship between the SiH4/NH3 flow rate ratio, the insulating film growth time, and the growth thickness, and the relationship between the position in the thickness direction and the etching rate.

FIG. 3 is a diagram illustrating the manufacturing process of an embodiment of the present invention.

FIG. 4 is a diagram showing the relationship between SiH4/NH3 flow rate ratio, growth time, and growth thickness.

FIG. 5 is a manufacturing process diagram of a method for forming an insulating film pattern according to the present invention.

6 is a continuation of FIG. 5, which is a manufacturing process diagram of the method for forming an insulating film pattern according to the present invention; FIG.

FIG. 7 is a diagram for explaining the manufacturing process of a semiconductor device in which a gate electrode is formed according to the present invention.

8 is a diagram for explaining the manufacturing process of a semiconductor device in which a gate electrode is formed according to the present invention, and is a continuation of FIG. 7; FIG.

9 is a diagram for explaining the manufacturing process of a semiconductor device in which a gate electrode is formed according to the present invention, and is a continuation of FIGS. 7 and 8. FIG.

FIG. 10 is a diagram showing a process of forming a contact hole using an insulating film according to a conventional method.

[Explanation of symbols]

31 Substrate 32 Silicon nitride insulating film 33 Photoresist 34 Resist opening 51 Substrate 52 Silicon nitride insulating film 53 Photoresist 54 Resist opening 55 Nitride insulating film opening 56 Conductive film 60 GaAs epitaxial wafer 61 Semi-insulating GaAs substrate 62 N-GaAs layer 64 Source Drain electrode 65 Silicon nitride insulating film 66 Resist 67 Resist opening 68 Insulating film opening pattern 69 Gate metal film 70 Resist 71 Gate electrode 75 Base conductive film 76 Insulating film 77 Resist 78 Contact hole 79 Tapered shape

Claims (6)

[Claims] Claim 1: In an insulating film formed on a substrate,
An insulating film characterized in that the etching rate of an etching gas or an etching solution changes in the thickness direction of the insulating film. 2. By changing the flow rate of a gas other than the carrier gas among the raw material gases used in the process of forming the insulating film on the substrate, while forming the insulating film,
A method for forming an insulating film, characterized in that the etching rate of an etching gas or an etching solution is varied in the thickness direction of the insulating film. 3. A step of coating and forming a photoresist on an insulating film formed on an insulating film substrate and having an etching rate varying in the thickness direction, and a step of exposing the insulating film by performing exposure and development. and removing the exposed insulating film by wet etching using the remaining photoresist as a mask to expose the substrate. 4. A step of coating and forming a photoresist on an insulating film formed on a substrate and having an etching rate varying in the thickness direction, a step of exposing the insulating film by exposure and development, and a step of exposing the insulating film, A method for forming an insulating film pattern, comprising at least the steps of removing the exposed insulating film portion by directional etching using a photoresist as a mask, and then removing a part of the exposed insulating film by wet etching. . 5. A step of forming a conductive film on a part of the substrate, and controlling the composition of the growth gas so that the etching rate of the insulating film with respect to the etching solution increases as the distance from the substrate increases. a step of forming a film, a step of forming an opening in the upper part of the conductive film using a resist as a mask using a lithography method, and an opening in the insulating film having a nearly perpendicular side wall below the opening by directional etching. and etching the insulating film with the etching solution to form an opening in which the upper part of the opening is larger than the lower part. 6. A step of forming a semiconductor layer including at least an active layer on a semiconductor substrate, a step of forming a source electrode and a drain electrode on a part of the semiconductor layer, and a step of forming an etching solution for an insulating film as the distance from the substrate increases. The composition of the growth gas is controlled to reduce the etching rate for C.
A step of forming an insulating film by a VD method, a step of forming an opening by a lithography method using a resist as a mask, and a step of forming an opening in the insulating film having a nearly vertical sidewall below the opening by directional etching. etching the insulating film with the etching solution to form an opening in which the upper dimension of the opening is smaller than that of the lower part;
The method includes a step of forming a gate metal film by vapor deposition, a step of forming a resist in a region including the opening, a step of removing the metal film other than the gate portion, and a step of removing the insulating film and the resist, respectively. A method for manufacturing a semiconductor device, characterized in that: