JPS6481368A - Nonvolatile semiconductor device - Google Patents

Nonvolatile semiconductor device

Info

Publication number
JPS6481368A
JPS6481368A JP23724687A JP23724687A JPS6481368A JP S6481368 A JPS6481368 A JP S6481368A JP 23724687 A JP23724687 A JP 23724687A JP 23724687 A JP23724687 A JP 23724687A JP S6481368 A JPS6481368 A JP S6481368A
Authority
JP
Japan
Prior art keywords
layer
groove
oxide film
partly
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23724687A
Other languages
Japanese (ja)
Inventor
Yoshio Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP23724687A priority Critical patent/JPS6481368A/en
Publication of JPS6481368A publication Critical patent/JPS6481368A/en
Pending legal-status Critical Current

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  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To inject high charge into a floating gate and to providing a high erasing efficiency even if a thin film forming area is reduced or increased in thickness by forming the local thin film of a first gate oxide film on the inner wall of a groove having a sharp edge formed in a diffused layer, and partly burying it in the groove to form the floating gate. CONSTITUTION:A first N-type diffused layer 23 is formed partly in the surface of a substrate 21 of an active region, and a silicon oxide film 24 is formed by thermally oxidizing on the whole surface of the substrate 21 of the active region including the surface of the layer 23. Then, part of the layer 12 is etched through an opening 25 formed at the film 24, and a groove 26 having a sharp edge is formed in the layer 23. Thereafter, a vary thin silicon oxide film 27 is formed on the inner wall of the groove 26, and a first gate oxide film 28 having a thin film is locally formed of the films 27, 24. Subsequently, an im purity high concentration doped first polysilicon layer 29 is deposited on the whole surface. This layer 29 is partly buried in the groove 26.
JP23724687A 1987-09-24 1987-09-24 Nonvolatile semiconductor device Pending JPS6481368A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23724687A JPS6481368A (en) 1987-09-24 1987-09-24 Nonvolatile semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23724687A JPS6481368A (en) 1987-09-24 1987-09-24 Nonvolatile semiconductor device

Publications (1)

Publication Number Publication Date
JPS6481368A true JPS6481368A (en) 1989-03-27

Family

ID=17012567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23724687A Pending JPS6481368A (en) 1987-09-24 1987-09-24 Nonvolatile semiconductor device

Country Status (1)

Country Link
JP (1) JPS6481368A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04211177A (en) * 1990-03-08 1992-08-03 Matsushita Electron Corp Nonvolatile semiconductor storage device and its manufacture
US5576569A (en) * 1994-05-06 1996-11-19 United Microelectronics Corporation Electrically programmable and erasable memory device with depression in lightly-doped source
US5606521A (en) * 1995-06-28 1997-02-25 Philips Electronics North America Corp. Electrically erasable and programmable read only memory with non-uniform dielectric thickness
US6294429B1 (en) 1999-11-24 2001-09-25 International Business Machines Corporation Method of forming a point on a floating gate for electron injection

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04211177A (en) * 1990-03-08 1992-08-03 Matsushita Electron Corp Nonvolatile semiconductor storage device and its manufacture
US5576569A (en) * 1994-05-06 1996-11-19 United Microelectronics Corporation Electrically programmable and erasable memory device with depression in lightly-doped source
US5606521A (en) * 1995-06-28 1997-02-25 Philips Electronics North America Corp. Electrically erasable and programmable read only memory with non-uniform dielectric thickness
US6294429B1 (en) 1999-11-24 2001-09-25 International Business Machines Corporation Method of forming a point on a floating gate for electron injection

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