JPS6476741A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6476741A
JPS6476741A JP62234655A JP23465587A JPS6476741A JP S6476741 A JPS6476741 A JP S6476741A JP 62234655 A JP62234655 A JP 62234655A JP 23465587 A JP23465587 A JP 23465587A JP S6476741 A JPS6476741 A JP S6476741A
Authority
JP
Japan
Prior art keywords
insulating films
semiconductor chip
insulating film
divided
resin sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62234655A
Other languages
Japanese (ja)
Other versions
JP2519259B2 (en
Inventor
Hajime Sato
Hiromichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62234655A priority Critical patent/JP2519259B2/en
Publication of JPS6476741A publication Critical patent/JPS6476741A/en
Application granted granted Critical
Publication of JP2519259B2 publication Critical patent/JP2519259B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of crack in resin sealing member, by providing a stress dispersing means to disperse stress in an insulating film for mounting semiconductor chip, in a semiconductor device sealed with resin sealing material. CONSTITUTION:An insulating film 2 is composed of divided insulating films 2a, 2b, 2c, 2d, which are made up, e.g., of polyimide resin material of 125mum thick. On the divided insulating films 2a, 2b, 2c, 2d, semiconductor chip 4 is bonded as a pellet with pellet bonding adhesive agent 5. By dividing, in this manner, the insulating film for mounting the semiconductor chip 4 into the divided insulating films 2a, 2b, 2c, 2d, the stress generating in the divided insulating films 2a, 2b, 2c, 2d is dispersed into four divisions, so that the generation of crack in resin sealing member 7 such as resin can be prevented.
JP62234655A 1987-09-17 1987-09-17 Semiconductor device Expired - Fee Related JP2519259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234655A JP2519259B2 (en) 1987-09-17 1987-09-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234655A JP2519259B2 (en) 1987-09-17 1987-09-17 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6476741A true JPS6476741A (en) 1989-03-22
JP2519259B2 JP2519259B2 (en) 1996-07-31

Family

ID=16974413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234655A Expired - Fee Related JP2519259B2 (en) 1987-09-17 1987-09-17 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2519259B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114058A (en) * 1987-10-28 1989-05-02 Hitachi Ltd Resin-sealed semiconductor device
JPH02251149A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
JPH04335559A (en) * 1991-05-13 1992-11-24 Hitachi Cable Ltd Lead frame for semiconductor device
US5278101A (en) * 1989-06-28 1994-01-11 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114058A (en) * 1987-10-28 1989-05-02 Hitachi Ltd Resin-sealed semiconductor device
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
JPH02251149A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
US5278101A (en) * 1989-06-28 1994-01-11 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
JPH04335559A (en) * 1991-05-13 1992-11-24 Hitachi Cable Ltd Lead frame for semiconductor device

Also Published As

Publication number Publication date
JP2519259B2 (en) 1996-07-31

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees