JPS647662A - Insulated gate field-effect transistor - Google Patents

Insulated gate field-effect transistor

Info

Publication number
JPS647662A
JPS647662A JP16343487A JP16343487A JPS647662A JP S647662 A JPS647662 A JP S647662A JP 16343487 A JP16343487 A JP 16343487A JP 16343487 A JP16343487 A JP 16343487A JP S647662 A JPS647662 A JP S647662A
Authority
JP
Japan
Prior art keywords
semiconductor
semiconductor substrate
layer
semiconductor layer
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16343487A
Other languages
Japanese (ja)
Inventor
Hideharu Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP16343487A priority Critical patent/JPS647662A/en
Publication of JPS647662A publication Critical patent/JPS647662A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect

Abstract

PURPOSE:To lower ON resistance while increasing breakdown strength between a source and a drain, and to remove the remarkable generation of irregularities in a semiconductor surface by forming a semiconductor layer, one part of which is connected to a semiconductor substrate along the semiconductor substrate, onto the semiconductor substrate and shaping a source region and a drain region at both end sections of the semiconductor layer. CONSTITUTION:A semiconductor layer 22, the periphery of which is coated through a gate insulating film 26 by a conductive layer 27 as a gate electrode in parallel with the surface of a semiconductor substrate 21, is formed onto the semiconductor substrate 21, and a source region 23 and a drain region 24 are shaped at both end sections of the semiconductor layer 22 so that at least one parts of both regions 23 and 24 are connected to the semiconductor substrate 21. Said semiconductor layer 22 is composed to a bar shape, the source region 23 and the drain region 24 are shaped at both ends in the longitudinal direction of the layer 22 and a channel forming region 25 is arranged between both regions 23 and 24, and the channel forming region 25 is connected to the substrate 21. A gate electrode 27 is formed through the gate insulating layer 26, surrounding the top face of the bar-shaped semiconductor layer 22 and an underside oppositely faced to the substrate 21.
JP16343487A 1987-06-30 1987-06-30 Insulated gate field-effect transistor Pending JPS647662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16343487A JPS647662A (en) 1987-06-30 1987-06-30 Insulated gate field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16343487A JPS647662A (en) 1987-06-30 1987-06-30 Insulated gate field-effect transistor

Publications (1)

Publication Number Publication Date
JPS647662A true JPS647662A (en) 1989-01-11

Family

ID=15773818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16343487A Pending JPS647662A (en) 1987-06-30 1987-06-30 Insulated gate field-effect transistor

Country Status (1)

Country Link
JP (1) JPS647662A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000049661A1 (en) * 1999-02-17 2000-08-24 Koninklijke Philips Electronics N.V. Insulated-gate field-effect semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000049661A1 (en) * 1999-02-17 2000-08-24 Koninklijke Philips Electronics N.V. Insulated-gate field-effect semiconductor device

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