JPS647502B2 - - Google Patents
Info
- Publication number
- JPS647502B2 JPS647502B2 JP16165383A JP16165383A JPS647502B2 JP S647502 B2 JPS647502 B2 JP S647502B2 JP 16165383 A JP16165383 A JP 16165383A JP 16165383 A JP16165383 A JP 16165383A JP S647502 B2 JPS647502 B2 JP S647502B2
- Authority
- JP
- Japan
- Prior art keywords
- width
- weld ring
- side extending
- wider
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000919 ceramic Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明は、半導体装置用セラミツクパツケージ
に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ceramic package for semiconductor devices.
従来の半導体装置用セラミツクパツケージのウ
エルドリング１は、第１図ａの平面図と同図ｂの
断面図に示すように、一辺内で一様な幅を有して
いる。このため、ワイヤーボンデイングを行なう
領域２が狭く、ボンデイング用のツール３がウエ
ルドリングに当たり、ボンデイングしづらいとい
う欠点があつた。 A weld ring 1 of a conventional ceramic package for a semiconductor device has a uniform width within one side, as shown in the plan view of FIG. 1a and the cross-sectional view of FIG. 1b. Therefore, the area 2 where wire bonding is performed is narrow, and the bonding tool 3 hits the weld ring, making bonding difficult.
この発明の目的は、ワイヤーボンデイングがし
やすい半導体装置用セラミツクパツケージを提供
することにある。 An object of the present invention is to provide a ceramic package for semiconductor devices that is easy to wire bond.
本発明の半導体装置用セラミツクパツケージ
は、半導体素子が搭載される凹部を有し、前記凹
部の周囲にワイヤーボンデイング領域となる前記
凹部よりも浅い段部を有し、前記段部の周囲のセ
ラミツク基体上面に金属キヤツプをシームウエル
ドにて封止するためのウエルドリングを有する半
導体装置用セラミツクパツケージにおいて、前記
ウエルドリングの一方向にのびる辺とこれに直交
する他方向にのびる他の辺とが交叉するそれぞれ
の角部に前記ウエルドリングの内側に平面的に突
出した矩形領域を有し、前記矩形領域の前記一方
向の幅は前記他方向にのびる他の辺の幅よりも幅
が広く、かつ、前記租形領域の他方向の幅は前記
一方向にのびる辺の幅よりも幅が広くなつている
ことを特徴とする。 A ceramic package for a semiconductor device according to the present invention has a recess in which a semiconductor element is mounted, a step around the recess that is shallower than the recess and serves as a wire bonding area, and a ceramic substrate around the step. In a ceramic package for a semiconductor device having a weld ring on the upper surface for sealing a metal cap with a seam weld, a side of the weld ring extending in one direction intersects with another side extending in the other direction perpendicular to the weld ring. Each corner has a rectangular area projecting planarly inside the weld ring, and the width of the rectangular area in the one direction is wider than the width of the other side extending in the other direction, and The width of the rectangular area in the other direction is wider than the width of the side extending in the one direction.
この発明の半導体装置用セラミツクパツケージ
の実施例は、第２図ａの平面図と同図ｂの断面図
に示すように、一辺内で幅の一様でないウエルド
リング１１を有している。従来の半導体装置用セ
ラミツクパツケージのボンデイング領域２に比
べ、このセラミツクパツケージのボンデイング領
域２１は広いので、余裕を持つてワイヤーボンデ
イングが行なえ、ボンデイング用ツール３がウエ
ルドリング１１の内側に当ることがない。特に第
３図に示すようにウエルドリング１１がずれて取
り付けられている場合には、従来のボンデイング
領域が幅２２を持つのに対し、この場合のセラミ
ツクパツケージのボンデイング領域は幅２３を持
ち、非常に有利である。 An embodiment of the ceramic package for a semiconductor device according to the present invention has a weld ring 11 having a width that is not uniform within one side, as shown in the plan view of FIG. 2a and the cross-sectional view of FIG. 2b. Since the bonding area 21 of this ceramic package is wider than the bonding area 2 of a conventional ceramic package for semiconductor devices, wire bonding can be performed with sufficient margin, and the bonding tool 3 does not hit the inside of the weld ring 11. Particularly when the weld ring 11 is attached with a misalignment as shown in FIG. advantageous to
従来の形状の金属キヤツプが使用可能で、かつ
従来のセラミツクパツケージよりも広いボンデイ
ング領域がとれるならば、ウエルドリングの形状
に制限はない。 There is no limit to the shape of the weld ring, provided that conventionally shaped metal caps can be used and a larger bonding area than conventional ceramic packages is available.
本発明によれば、ワイヤーボンデイングがしや
すくなるという効果を生ずる。 According to the present invention, there is an effect that wire bonding becomes easier.
第１図ａ，ｂは従来の例を示す平面図、Ａ−Ａ
断面図、第２図ａ，ｂは本発明の実施例を示す平
面図、Ｂ−Ｂ断面図、第３図は本発明の実施例を
示す平面図である。
１……ウエルドリング、２……ワイヤーボンデ
イング領域、３……ワイヤーボンデイング用ツー
ル、１１……ウエルドリング、２１……ワイヤー
ボンデイング領域。
Figures 1a and 1b are plan views showing conventional examples, A-A
A sectional view, FIGS. 2a and 2b are a plan view showing an embodiment of the present invention, a BB sectional view, and FIG. 3 a plan view showing an embodiment of the present invention. 1... Weld ring, 2... Wire bonding area, 3... Wire bonding tool, 11... Weld ring, 21... Wire bonding area.
Claims (1)
部の周囲にワイヤーボンデイング領域となる前記
凹部よりも浅い段部を有し、前記段部の周囲のセ
ラミツク基体上面に金属キヤツプをシームウエル
ドにて封止するためのウエルドリングを有する半
導体装置用セラミツクパツケージにおいて、前記
ウエルドリングの一方向にのびる辺とこれに直交
する他方向にのびる他の辺とが交叉するそれぞれ
の角部に前記ウエルドリングの内側に平面的に突
出した矩形領域を有し、前記矩形領域の前記一方
向の幅は前記他方向にのびる他の辺の幅よりも幅
が広く、かつ、前記矩形領域の他方向の幅は前記
一方向にのびる辺の幅よりも幅が広くなつている
ことを特徴とする半導体装置用セラミツクパツケ
ージ。1 It has a recess in which a semiconductor element is mounted, a step around the recess that is shallower than the recess and serves as a wire bonding area, and a metal cap is seam-welded on the upper surface of the ceramic substrate around the step. In a ceramic package for a semiconductor device having a weld ring for sealing, the weld ring is provided at each corner where a side extending in one direction of the weld ring intersects with another side extending in the other direction orthogonal thereto. It has a rectangular area that projects inward in plan view, and the width of the rectangular area in the one direction is wider than the width of the other side extending in the other direction, and the width of the rectangular area in the other direction is wider than the width of the other side extending in the other direction. A ceramic package for a semiconductor device, characterized in that the width is wider than the width of the side extending in one direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16165383A JPS6053056A (en) | 1983-09-02 | 1983-09-02 | Ceramic package for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16165383A JPS6053056A (en) | 1983-09-02 | 1983-09-02 | Ceramic package for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6053056A JPS6053056A (en) | 1985-03-26 |
| JPS647502B2 true JPS647502B2 (en) | 1989-02-09 |
Family
ID=15739271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16165383A Granted JPS6053056A (en) | 1983-09-02 | 1983-09-02 | Ceramic package for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6053056A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020246159A1 (en) * | 2019-06-04 | 2020-12-10 | 株式会社村田製作所 | Random number generation device |
-
1983
- 1983-09-02 JP JP16165383A patent/JPS6053056A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020246159A1 (en) * | 2019-06-04 | 2020-12-10 | 株式会社村田製作所 | Random number generation device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6053056A (en) | 1985-03-26 |
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