JPS5839046U - semiconductor package - Google Patents

semiconductor package

Info

Publication number
JPS5839046U
JPS5839046U JP1981132770U JP13277081U JPS5839046U JP S5839046 U JPS5839046 U JP S5839046U JP 1981132770 U JP1981132770 U JP 1981132770U JP 13277081 U JP13277081 U JP 13277081U JP S5839046 U JPS5839046 U JP S5839046U
Authority
JP
Japan
Prior art keywords
cap
seal frame
semiconductor package
peripheral edge
protrusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1981132770U
Other languages
Japanese (ja)
Inventor
恒 渡辺
小嶋　春夫
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP1981132770U priority Critical patent/JPS5839046U/en
Publication of JPS5839046U publication Critical patent/JPS5839046U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Packaging Of Annular Or Rod-Shaped Articles, Wearing Apparel, Cassettes, Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案に係る半導体パッケージの実施例を示すも
ので、第１図は第１の実施例のパッケージ正面断面図、
第２図は同キャップの他の例を示す正面断面図、第３図
は第２の実施例のパッケージ正面断面図である。 図中、１は容器、２はチップ、３．１２はシールフレー
ム、４．４’、１１はキャップ、５は外リード、６はワ
イヤ、７．１３は突起、９はぼり（突起）である。The drawings show an embodiment of the semiconductor package according to the present invention, and FIG. 1 is a front sectional view of the package of the first embodiment;
FIG. 2 is a front sectional view showing another example of the same cap, and FIG. 3 is a front sectional view of the package of the second embodiment. In the figure, 1 is a container, 2 is a chip, 3.12 is a seal frame, 4.4', 11 is a cap, 5 is an outer lead, 6 is a wire, 7.13 is a protrusion, and 9 is a ridge (protrusion). .

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] チップを搭載する容器の上部周辺に設けられたシールフ
レーム上面にキャップの周縁部をシーム溶接してなる半
導体パッケージにおいて、前記キャップ周縁部のシール
フレームに対向する部分または前記シールフレーム上面
の前記キャップ周縁部に対向する部分の何れか一方に突
起を一体に連続形成し、前記キャップと前記シールフレ
ームを前記突起を介し接触させて該接触部をシーム溶接
できるように構成されたことを特徴とする半導体In a semiconductor package in which a peripheral edge of a cap is seam-welded to the upper surface of a seal frame provided around the upper part of a container in which a chip is mounted, a portion of the peripheral edge of the cap facing the seal frame or a peripheral edge of the cap on the upper surface of the seal frame. A semiconductor device characterized in that a protrusion is integrally and continuously formed on one of the parts facing the part, and the cap and the seal frame are brought into contact through the protrusion so that the contact part can be seam welded.
JP1981132770U 1981-09-07 1981-09-07 semiconductor package Pending JPS5839046U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981132770U JPS5839046U (en) 1981-09-07 1981-09-07 semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981132770U JPS5839046U (en) 1981-09-07 1981-09-07 semiconductor package

Publications (1)

Publication Number Publication Date
JPS5839046U true JPS5839046U (en) 1983-03-14

Family

ID=29926283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981132770U Pending JPS5839046U (en) 1981-09-07 1981-09-07 semiconductor package

Country Status (1)

Country Link
JP (1) JPS5839046U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856357A (en) * 1981-09-30 1983-04-04 Fujitsu Ltd Package for semiconductor device
JPH09293799A (en) * 1996-04-26 1997-11-11 Nec Corp Semiconductor integrated circuit package and manufacture thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856357A (en) * 1981-09-30 1983-04-04 Fujitsu Ltd Package for semiconductor device
JPH09293799A (en) * 1996-04-26 1997-11-11 Nec Corp Semiconductor integrated circuit package and manufacture thereof

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