JPS5911448U - semiconductor package - Google Patents

semiconductor package

Info

Publication number
JPS5911448U
JPS5911448U JP1982105711U JP10571182U JPS5911448U JP S5911448 U JPS5911448 U JP S5911448U JP 1982105711 U JP1982105711 U JP 1982105711U JP 10571182 U JP10571182 U JP 10571182U JP S5911448 U JPS5911448 U JP S5911448U
Authority
JP
Japan
Prior art keywords
semiconductor package
metal plate
sealing metal
semiconductor
package according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982105711U
Other languages
Japanese (ja)
Inventor
長狭川　祐一
健一 矢崎
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP1982105711U priority Critical patent/JPS5911448U/en
Publication of JPS5911448U publication Critical patent/JPS5911448U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Casings For Electric Apparatus (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は一般的なセラミックパッケージの構造を示す断
面図、第２図は従来のパッケージ封止用金属板の断面図
、第３図は従来の封止部の要部断　−面図、第４図は本
考案の一実施例でありａは本考案にかかるパッケージ封
止用金属板の断面図、ｂは封着部の要部断面図、第５図
は本考案の他の実施例であり、ａは本考案にかかるパッ
ケージ封止用金属板め断面図、ｂは封着部の要部断面図
である。 １・・・・・・セラミック基板、２・・・・・・半導体
チップ、３・・・・・・外部リード、４・・・・・・ワ
イヤ、５・・・・・・Ａｕ　−３ｎろう剤、６，７・・
・・・・パッケージ封止用金属板、８・・・・・・マー
ク、９・・・・・・突起。Fig. 1 is a cross-sectional view showing the structure of a general ceramic package, Fig. 2 is a cross-sectional view of a conventional metal plate for package sealing, Fig. 3 is a cross-sectional view of main parts of a conventional sealing part, Figure 4 shows one embodiment of the present invention; a is a cross-sectional view of a metal plate for package sealing according to the present invention; b is a cross-sectional view of a main part of the sealing part; Figure 5 is another embodiment of the present invention. FIG. 2A is a cross-sectional view of a metal plate for package sealing according to the present invention, and FIG. 1...Ceramic substrate, 2...Semiconductor chip, 3...External lead, 4...Wire, 5...Au-3n solder agent, 6,7...
...Metal plate for package sealing, 8...Mark, 9...Protrusion.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] （１）側面がテーパ状に形成された封止用金属板が、半
導体チップを収容した容器の開口部に配置され、封止剤
にて該容器に封着されてなることを特徴とする半導体パ
ッケージ。(1) A semiconductor characterized in that a sealing metal plate with a tapered side surface is placed in the opening of a container containing a semiconductor chip, and is sealed to the container with a sealant. package. （２）前記テーパ状の側面は、前記封止用金属板の側面
に生じたパリにより形成されていることを特徴とする特
許請求の範囲第１項記載の半導体パッケージ。(2) The semiconductor package according to claim 1, wherein the tapered side surface is formed by a paris generated on the side surface of the sealing metal plate. （３）　　前記封止用金属板は、裏面に表裏識別用マー
クを有することを特徴とする特許請求の範囲第１項記載
の半導体パッケージ。(3) The semiconductor package according to claim 1, wherein the sealing metal plate has a front-back identification mark on the back surface.
JP1982105711U 1982-07-13 1982-07-13 semiconductor package Pending JPS5911448U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982105711U JPS5911448U (en) 1982-07-13 1982-07-13 semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982105711U JPS5911448U (en) 1982-07-13 1982-07-13 semiconductor package

Publications (1)

Publication Number Publication Date
JPS5911448U true JPS5911448U (en) 1984-01-24

Family

ID=30247666

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982105711U Pending JPS5911448U (en) 1982-07-13 1982-07-13 semiconductor package

Country Status (1)

Country Link
JP (1) JPS5911448U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5498178A (en) * 1978-01-20 1979-08-02 Hitachi Ltd Electronic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5498178A (en) * 1978-01-20 1979-08-02 Hitachi Ltd Electronic device

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