JPS6194358U - - Google Patents
Info
- Publication number
- JPS6194358U JPS6194358U JP1984179109U JP17910984U JPS6194358U JP S6194358 U JPS6194358 U JP S6194358U JP 1984179109 U JP1984179109 U JP 1984179109U JP 17910984 U JP17910984 U JP 17910984U JP S6194358 U JPS6194358 U JP S6194358U
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- resin
- semiconductor chip
- notch
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案の一実施例による放熱板の平面
図であり、第2図は従来の樹脂封止半導体装置の
断面図、第3図は従来の樹脂封止半導体装置の平
面図である。
1……放熱板、2……半導体チツプ、3……リ
ード端子、4……金属細線、5……封止樹脂、6
……取りつけ穴、7……切欠部。
FIG. 1 is a plan view of a heat sink according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a conventional resin-sealed semiconductor device, and FIG. 3 is a plan view of a conventional resin-sealed semiconductor device. . DESCRIPTION OF SYMBOLS 1... Heat sink, 2... Semiconductor chip, 3... Lead terminal, 4... Fine metal wire, 5... Sealing resin, 6
...Mounting hole, 7...Notch.
Claims (1)
チツプおよび放熱板の主要部の全面を封止した樹
脂とを有し、前記放熱板には切欠部を備えた取り
つけ用ネジ穴部を有することを特徴とする樹脂封
止半導体装置。 The heat sink has a heat sink to which a semiconductor chip is attached, and a resin that seals the entire surface of the semiconductor chip and the main parts of the heat sink, and the heat sink has a mounting screw hole with a notch. Resin-sealed semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984179109U JPS6194358U (en) | 1984-11-26 | 1984-11-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984179109U JPS6194358U (en) | 1984-11-26 | 1984-11-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6194358U true JPS6194358U (en) | 1986-06-18 |
Family
ID=30736672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984179109U Pending JPS6194358U (en) | 1984-11-26 | 1984-11-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6194358U (en) |
-
1984
- 1984-11-26 JP JP1984179109U patent/JPS6194358U/ja active Pending
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