JPS6457678A - Manufacture of field-effect transistor - Google Patents

Manufacture of field-effect transistor

Info

Publication number
JPS6457678A
JPS6457678A JP21287287A JP21287287A JPS6457678A JP S6457678 A JPS6457678 A JP S6457678A JP 21287287 A JP21287287 A JP 21287287A JP 21287287 A JP21287287 A JP 21287287A JP S6457678 A JPS6457678 A JP S6457678A
Authority
JP
Japan
Prior art keywords
opening
insulating layer
etched away
semiconductor substrate
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21287287A
Other languages
Japanese (ja)
Inventor
Hiromichi Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP21287287A priority Critical patent/JPS6457678A/en
Publication of JPS6457678A publication Critical patent/JPS6457678A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a FET easily controlling the width of cavity requiring no alignment with high precision by a method wherein an insulating layer is etched away to make an opening and further etched away to extend the opening in the leteral direction so that a semiconductor substrate exposed to the opening may be etched away to make a cavity and so forth. CONSTITUTION:The first insulating layer 11 is formed on the main surface of semiconductor substrates 101, 102; a photoresist layer 12 is laminatedly coated on the first insulating layer 11; and an opening part 12a is formed adjacently to the region where a gate electrode is to be formed. First, the first insulating layer 11 exposed to said opening 12a is etched away to make another opening 11a reaching the semiconductor substrate 102 and then the opening 11a is further etched away to be extended along the main surface of the semiconductor substrate 102. Second, the semiconductor substrate 102 exposed to said opening 11a is etched away to make a cavity 13 and then the second insulating layer 14 is formed on a part of the semiconductor substrate 102 in the cavity 13 by lift-off process. Finally, a gate electrode 103G is formed in a gap 15 near a source electrode out of the gaps between the first insulating layer 11 and the second insulating layer 14.
JP21287287A 1987-08-28 1987-08-28 Manufacture of field-effect transistor Pending JPS6457678A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21287287A JPS6457678A (en) 1987-08-28 1987-08-28 Manufacture of field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21287287A JPS6457678A (en) 1987-08-28 1987-08-28 Manufacture of field-effect transistor

Publications (1)

Publication Number Publication Date
JPS6457678A true JPS6457678A (en) 1989-03-03

Family

ID=16629670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21287287A Pending JPS6457678A (en) 1987-08-28 1987-08-28 Manufacture of field-effect transistor

Country Status (1)

Country Link
JP (1) JPS6457678A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020250041A1 (en) * 2019-06-10 2020-12-17 株式会社ティラド Heat exchanger

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020250041A1 (en) * 2019-06-10 2020-12-17 株式会社ティラド Heat exchanger

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