JPS6451552A - Data transfer control system - Google Patents

Data transfer control system

Info

Publication number
JPS6451552A
JPS6451552A JP20846487A JP20846487A JPS6451552A JP S6451552 A JPS6451552 A JP S6451552A JP 20846487 A JP20846487 A JP 20846487A JP 20846487 A JP20846487 A JP 20846487A JP S6451552 A JPS6451552 A JP S6451552A
Authority
JP
Japan
Prior art keywords
input
output device
data transmission
register
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20846487A
Other languages
Japanese (ja)
Inventor
Hiroyuki Tsunemoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20846487A priority Critical patent/JPS6451552A/en
Publication of JPS6451552A publication Critical patent/JPS6451552A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To efficiently control data transmission in a byte multiplex mode by constituting the titled system so that a microprocessor makes data transmission involving an input/output device continue without accessing a main memory in case of executing said transmission at a time when the status display of the input/output device shows that data transmission is under execution. CONSTITUTION:When a data transmission request is issued from the input/output device, the microprocessor 1 stores the address of a subchannel corresponding to the input/output device in a register 3, and issues an access request to obtain a part of control information i.e. input/output device status information or the information of remaining quantity of data. At this time, if the input/output device status information is in data transfer and the contents of a register 4 held at the time of storing control information is coincident with the content of a register 3 by a comparator 5, a data transmission start request is issued so that data transmission from the same one input/output device is continued without accessing the main memory.
JP20846487A 1987-08-21 1987-08-21 Data transfer control system Pending JPS6451552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20846487A JPS6451552A (en) 1987-08-21 1987-08-21 Data transfer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20846487A JPS6451552A (en) 1987-08-21 1987-08-21 Data transfer control system

Publications (1)

Publication Number Publication Date
JPS6451552A true JPS6451552A (en) 1989-02-27

Family

ID=16556615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20846487A Pending JPS6451552A (en) 1987-08-21 1987-08-21 Data transfer control system

Country Status (1)

Country Link
JP (1) JPS6451552A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06128788A (en) * 1992-10-19 1994-05-10 Mishima Kosan Co Ltd Precision electroformed mold

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06128788A (en) * 1992-10-19 1994-05-10 Mishima Kosan Co Ltd Precision electroformed mold

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