JPS6448462A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6448462A
JPS6448462A JP62204071A JP20407187A JPS6448462A JP S6448462 A JPS6448462 A JP S6448462A JP 62204071 A JP62204071 A JP 62204071A JP 20407187 A JP20407187 A JP 20407187A JP S6448462 A JPS6448462 A JP S6448462A
Authority
JP
Japan
Prior art keywords
mosfet
minimized
semiconductor substrate
disposed
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62204071A
Other languages
Japanese (ja)
Inventor
Yoshio Karasawa
Keisuke Takada
Izuru Sakurazawa
Hideaki Nagashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP62204071A priority Critical patent/JPS6448462A/en
Publication of JPS6448462A publication Critical patent/JPS6448462A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits

Abstract

PURPOSE:To stabilize the current ratio of a MOSFET, by disposing each of the MOSFETs so that the direction from a source toward a drain is inclined at + or -45 deg. with the crystallographic axis of a semiconductor substrate. CONSTITUTION:Each unit MOSFET which comprises an insulating gate 2, source and drain diffusion layers 3, 4, and a contact hole 5 on a silicon semiconductor substrate 1 is so disposed that the current flow direction or the longitudinal direction of a channel is inclined at 45 deg. or 135 deg. with the base axis x or y. In such a manner, the device is so disposed as to be inclined at 45 deg. with the base crystallographic axis in the {100} plane of a wafer, which enables the piezoelectric effect in the resistance part thereof to be minimized. Therefore, the resistance change in the channel part thereof, resulting from the stresses during the MOSFET being assembled or molded, can be minimized. As a result, the current ratio indispensable to DAC can be stabilized.
JP62204071A 1987-08-19 1987-08-19 Semiconductor device Pending JPS6448462A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62204071A JPS6448462A (en) 1987-08-19 1987-08-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62204071A JPS6448462A (en) 1987-08-19 1987-08-19 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6448462A true JPS6448462A (en) 1989-02-22

Family

ID=16484282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62204071A Pending JPS6448462A (en) 1987-08-19 1987-08-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6448462A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004087640A (en) * 2002-08-26 2004-03-18 Renesas Technology Corp Semiconductor device
WO2005064680A1 (en) * 2003-12-25 2005-07-14 Fujitsu Limited Semiconductor device and semiconductor integrated circuit device
JP2006060039A (en) * 2004-08-20 2006-03-02 Nec Electronics Corp Field effect transistor, manufacturing method thereof and complementary field effect transistor
JP2007329295A (en) * 2006-06-08 2007-12-20 Hitachi Ltd Semiconductor, and its manufacturing method
US8039836B2 (en) 2005-09-06 2011-10-18 Canon Kabushiki Kaisha Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004087640A (en) * 2002-08-26 2004-03-18 Renesas Technology Corp Semiconductor device
WO2005064680A1 (en) * 2003-12-25 2005-07-14 Fujitsu Limited Semiconductor device and semiconductor integrated circuit device
JP2006060039A (en) * 2004-08-20 2006-03-02 Nec Electronics Corp Field effect transistor, manufacturing method thereof and complementary field effect transistor
US8039836B2 (en) 2005-09-06 2011-10-18 Canon Kabushiki Kaisha Semiconductor device
JP2007329295A (en) * 2006-06-08 2007-12-20 Hitachi Ltd Semiconductor, and its manufacturing method

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