JPS6446975A - Semiconductor integrated circuit and manufacture thereof - Google Patents

Semiconductor integrated circuit and manufacture thereof

Info

Publication number
JPS6446975A
JPS6446975A JP20340987A JP20340987A JPS6446975A JP S6446975 A JPS6446975 A JP S6446975A JP 20340987 A JP20340987 A JP 20340987A JP 20340987 A JP20340987 A JP 20340987A JP S6446975 A JPS6446975 A JP S6446975A
Authority
JP
Japan
Prior art keywords
region
self
gate region
contact part
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20340987A
Other languages
Japanese (ja)
Other versions
JP2512760B2 (en
Inventor
Yutaka Misawa
Hideo Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62203409A priority Critical patent/JP2512760B2/en
Publication of JPS6446975A publication Critical patent/JPS6446975A/en
Application granted granted Critical
Publication of JP2512760B2 publication Critical patent/JP2512760B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To enable high density integration and high speed operation, by forming a gate region, an element isolation region, and a contact part of source.drain region all in a self-alignment structure. CONSTITUTION:An element isolation region by a field oxide film 17 by an SiO2 film is self-aligned, via a gate region by polycrystalline silicon 12, and the sidewalls 15, 16 of the gate region by an SiO2 film and an Si3N4 film. On the other hand, a contact part between a source region and a drain region is self-aligned via the gate region 12 and the sidewall 15. Therefore, the gate region, the element isolation region, and the contact part of a source.drain region are all subjected to self alignment. Thereby, mask-alignment margin is unnecessitated, and miniaturizing the element is enabled, so that high density integration and high speed operation of semiconductor integrated circuit can be realized.
JP62203409A 1987-08-18 1987-08-18 Manufacturing method of semiconductor integrated circuit Expired - Lifetime JP2512760B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62203409A JP2512760B2 (en) 1987-08-18 1987-08-18 Manufacturing method of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62203409A JP2512760B2 (en) 1987-08-18 1987-08-18 Manufacturing method of semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS6446975A true JPS6446975A (en) 1989-02-21
JP2512760B2 JP2512760B2 (en) 1996-07-03

Family

ID=16473587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62203409A Expired - Lifetime JP2512760B2 (en) 1987-08-18 1987-08-18 Manufacturing method of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JP2512760B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60178666A (en) * 1984-02-27 1985-09-12 Hitachi Ltd Semiconductor device and manufacture thereof
JPS61141180A (en) * 1984-12-14 1986-06-28 Nippon Telegr & Teleph Corp <Ntt> Field-effect transistor and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60178666A (en) * 1984-02-27 1985-09-12 Hitachi Ltd Semiconductor device and manufacture thereof
JPS61141180A (en) * 1984-12-14 1986-06-28 Nippon Telegr & Teleph Corp <Ntt> Field-effect transistor and manufacture thereof

Also Published As

Publication number Publication date
JP2512760B2 (en) 1996-07-03

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