JPS643059B2 - - Google Patents

Info

Publication number
JPS643059B2
JPS643059B2 JP5366683A JP5366683A JPS643059B2 JP S643059 B2 JPS643059 B2 JP S643059B2 JP 5366683 A JP5366683 A JP 5366683A JP 5366683 A JP5366683 A JP 5366683A JP S643059 B2 JPS643059 B2 JP S643059B2
Authority
JP
Japan
Prior art keywords
film
resist film
bump electrode
bump
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5366683A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59181577A (ja
Inventor
Isao Honma
Muneo Hiramitsu
Yasushi Matsumi
Hitoshi Tsubone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP5366683A priority Critical patent/JPS59181577A/ja
Publication of JPS59181577A publication Critical patent/JPS59181577A/ja
Publication of JPS643059B2 publication Critical patent/JPS643059B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
JP5366683A 1983-03-31 1983-03-31 半導体装置の製造方法 Granted JPS59181577A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5366683A JPS59181577A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5366683A JPS59181577A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59181577A JPS59181577A (ja) 1984-10-16
JPS643059B2 true JPS643059B2 (fi) 1989-01-19

Family

ID=12949168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5366683A Granted JPS59181577A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59181577A (fi)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521653Y2 (fi) * 1988-07-09 1993-06-03

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5136363A (en) * 1987-10-21 1992-08-04 Kabushiki Kaisha Toshiba Semiconductor device with bump electrode
JP3345884B2 (ja) * 1996-08-08 2002-11-18 横河電機株式会社 半導体集積回路及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521653Y2 (fi) * 1988-07-09 1993-06-03

Also Published As

Publication number Publication date
JPS59181577A (ja) 1984-10-16

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