JPS6428754A - Recognizing and controlling system for memory constitution - Google Patents
Recognizing and controlling system for memory constitutionInfo
- Publication number
- JPS6428754A JPS6428754A JP18332187A JP18332187A JPS6428754A JP S6428754 A JPS6428754 A JP S6428754A JP 18332187 A JP18332187 A JP 18332187A JP 18332187 A JP18332187 A JP 18332187A JP S6428754 A JPS6428754 A JP S6428754A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- constitution
- recognizing
- register
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE:To make access to a memory without sensing a memory constitution by recognizing the constitution of the memory previously to an ordinary memory access and storing this result in a memory constitution register. CONSTITUTION:Initially, a memory constitution recognizing mode is instructed to a constitution recognition flag register 105. Consequently, the constitution recognizing mode is obtained, a capacity discriminating circuit 106 has the data input 117 of a memory constitution information register 104 to discriminate the memory constitution. A memory package selecting circuit 107 has the output signal 115 of an address decoder 114 and the output signal 124 of the circuit 106 as the input and outputs a RAS signal 119 corresponding to respective connectors 102a-d. A RAS signal forming circuits 108a-d select the output signal 115 of an address decoder 113 by the data 118 of the register 105 to form a RAS signal 120 to memory package 103a-d. Thereby, successively address are allocated to the arbitrary combination of the connectors 102a-d and the packages 103a-d.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62183321A JP2510604B2 (en) | 1987-07-24 | 1987-07-24 | Storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62183321A JP2510604B2 (en) | 1987-07-24 | 1987-07-24 | Storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6428754A true JPS6428754A (en) | 1989-01-31 |
JP2510604B2 JP2510604B2 (en) | 1996-06-26 |
Family
ID=16133658
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62183321A Expired - Lifetime JP2510604B2 (en) | 1987-07-24 | 1987-07-24 | Storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2510604B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242448A (en) * | 1989-03-16 | 1990-09-26 | Seiko Epson Corp | Automatic dram type setting device |
JPH05289937A (en) * | 1992-04-06 | 1993-11-05 | Yamaha Corp | Memory control circuit |
JPH06180986A (en) * | 1992-10-01 | 1994-06-28 | Hudson Soft Co Ltd | Memory controller unit |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60150146A (en) * | 1984-01-17 | 1985-08-07 | Mitsubishi Electric Corp | Main memory selector of electronic computer |
JPS60220441A (en) * | 1984-04-16 | 1985-11-05 | Nec Corp | Memory control system |
JPS61129792A (en) * | 1984-11-27 | 1986-06-17 | Fujitsu Ltd | Included packaging memory access processing system |
JPS61176654U (en) * | 1984-12-26 | 1986-11-04 |
-
1987
- 1987-07-24 JP JP62183321A patent/JP2510604B2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60150146A (en) * | 1984-01-17 | 1985-08-07 | Mitsubishi Electric Corp | Main memory selector of electronic computer |
JPS60220441A (en) * | 1984-04-16 | 1985-11-05 | Nec Corp | Memory control system |
JPS61129792A (en) * | 1984-11-27 | 1986-06-17 | Fujitsu Ltd | Included packaging memory access processing system |
JPS61176654U (en) * | 1984-12-26 | 1986-11-04 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242448A (en) * | 1989-03-16 | 1990-09-26 | Seiko Epson Corp | Automatic dram type setting device |
JPH05289937A (en) * | 1992-04-06 | 1993-11-05 | Yamaha Corp | Memory control circuit |
JPH06180986A (en) * | 1992-10-01 | 1994-06-28 | Hudson Soft Co Ltd | Memory controller unit |
Also Published As
Publication number | Publication date |
---|---|
JP2510604B2 (en) | 1996-06-26 |
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