JPS6431257A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS6431257A
JPS6431257A JP62187196A JP18719687A JPS6431257A JP S6431257 A JPS6431257 A JP S6431257A JP 62187196 A JP62187196 A JP 62187196A JP 18719687 A JP18719687 A JP 18719687A JP S6431257 A JPS6431257 A JP S6431257A
Authority
JP
Japan
Prior art keywords
output terminal
data
input
ram
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62187196A
Other languages
Japanese (ja)
Other versions
JPH087741B2 (en
Inventor
Takao Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62187196A priority Critical patent/JPH087741B2/en
Publication of JPS6431257A publication Critical patent/JPS6431257A/en
Publication of JPH087741B2 publication Critical patent/JPH087741B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To attain the high speed access of plural memories, especially, a ROM and a RAM without increasing the number of input terminals by selecting a data input and output terminal and a parallel input and output terminal according to the selection of a memory pointer register. CONSTITUTION:An address output terminal 1 outputs an address signal to the ROM 5 and the RAM 6, the data input and output terminal 2 inputs and outputs the data of the RAM 6, a control signal output terminal 3 controls the reading and the writing of the data of the RAM 6 and the parallel input and output terminal 4 operates as the data input and output terminal of the ROM 5. The plural memory pointer registers are previously assigned for the ROM and for the RAM, and the control signal is switched by the selected memory pointer register to select the data on the data input and output terminal 2 and the data on the parallel input and output terminal 4. In such a way, since the parallel input and output terminal 4 is used as the input and output terminal of the ROM data, it is not required to newly dispose a terminal and since the data input and output terminals of the ROM 5 and the RAM 6 are separated, the collision of the data is not generated to easily control.
JP62187196A 1987-07-27 1987-07-27 Semiconductor integrated circuit Expired - Fee Related JPH087741B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62187196A JPH087741B2 (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62187196A JPH087741B2 (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS6431257A true JPS6431257A (en) 1989-02-01
JPH087741B2 JPH087741B2 (en) 1996-01-29

Family

ID=16201781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62187196A Expired - Fee Related JPH087741B2 (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH087741B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007078119A (en) * 2005-09-15 2007-03-29 Saginomiya Seisakusho Inc Flow path selector valve

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007078119A (en) * 2005-09-15 2007-03-29 Saginomiya Seisakusho Inc Flow path selector valve

Also Published As

Publication number Publication date
JPH087741B2 (en) 1996-01-29

Similar Documents

Publication Publication Date Title
KR850004684A (en) Semiconductor memory
KR880013168A (en) Semiconductor memory
KR910005308A (en) Semiconductor memory
KR870010551A (en) Dynamic RAM
KR840000852A (en) 2D address device
EP0434901A3 (en) A memory module utilizing partially defective memory chips
US4155115A (en) Process control system with analog output control circuit
JPS5730838A (en) Layout processing system
JPS6431257A (en) Semiconductor integrated circuit
HK6793A (en) Integrated semiconductor memory
JPS55134442A (en) Data transfer unit
JPS5696350A (en) Memory extension system
JPS56156978A (en) Memory control system
KR900002193A (en) Microprocessor
EP0157341B1 (en) Memory interface circuit
JPS57100691A (en) Memory access control system
JPS5730196A (en) Information processor
JPS6428754A (en) Recognizing and controlling system for memory constitution
JPS5556262A (en) Operation hysteresis retention system
JPS648591A (en) Memory ic
SU813481A1 (en) Device for reading-out graphic information from cards
JPS5798172A (en) Memory access controlling circuit
JPS6488991A (en) Ic memory with clearing circuit
JPS55102046A (en) Logic circuit
JPS5690488A (en) Memory device

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees