JPS5798172A - Memory access controlling circuit - Google Patents
Memory access controlling circuitInfo
- Publication number
- JPS5798172A JPS5798172A JP17301580A JP17301580A JPS5798172A JP S5798172 A JPS5798172 A JP S5798172A JP 17301580 A JP17301580 A JP 17301580A JP 17301580 A JP17301580 A JP 17301580A JP S5798172 A JPS5798172 A JP S5798172A
- Authority
- JP
- Japan
- Prior art keywords
- address signal
- boundary value
- mounting
- signal
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
Abstract
PURPOSE:To easily control an address of a memory device constituted of memory chips having different number of address terminals respectively, by providing each specific boundary value setting means, comparing circuit and gate circuit. CONSTITUTION:This device is provided with a means for setting a mounting boundary value B showing a sort of the first and second memory chips, a comparing circuit 1 for comparing and discriminating this boundary value B and a mounting address signal A, selecting circuits 5, 6 for dividing a 2n input address signal into 2 by a selecting signal C and outputting it as an n/2 output address signal, and gate circuits 2-4 connected to its prescribed input terminals. In this state, when the value of the mounting address signal A has exceeded the boundary value B, the eight signal of a memory address signal is supplied to the prescribed input terminal, and when the value of the mounting address signal A is the boundary value B or less, a prescribed address signal of the memory address signal is supplied to the prescribed input terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17301580A JPS5798172A (en) | 1980-12-08 | 1980-12-08 | Memory access controlling circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17301580A JPS5798172A (en) | 1980-12-08 | 1980-12-08 | Memory access controlling circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5798172A true JPS5798172A (en) | 1982-06-18 |
Family
ID=15952611
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17301580A Pending JPS5798172A (en) | 1980-12-08 | 1980-12-08 | Memory access controlling circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5798172A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60229152A (en) * | 1984-04-27 | 1985-11-14 | Omron Tateisi Electronics Co | Memory device |
JP2009156210A (en) * | 2007-12-27 | 2009-07-16 | Mitsubishi Electric Corp | Blower device |
-
1980
- 1980-12-08 JP JP17301580A patent/JPS5798172A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60229152A (en) * | 1984-04-27 | 1985-11-14 | Omron Tateisi Electronics Co | Memory device |
JP2009156210A (en) * | 2007-12-27 | 2009-07-16 | Mitsubishi Electric Corp | Blower device |
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