JPS55151806A - Signal level control circuit - Google Patents
Signal level control circuitInfo
- Publication number
- JPS55151806A JPS55151806A JP5910079A JP5910079A JPS55151806A JP S55151806 A JPS55151806 A JP S55151806A JP 5910079 A JP5910079 A JP 5910079A JP 5910079 A JP5910079 A JP 5910079A JP S55151806 A JPS55151806 A JP S55151806A
- Authority
- JP
- Japan
- Prior art keywords
- current
- signal level
- millers
- control circuit
- level control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/02—Manually-operated control
- H03G3/04—Manually-operated control in untuned amplifiers
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To secure the easy control of the signal level by inserting plural units of the current Miller having different emitter area ratios in parallel to the path of the signal current and then giving the ON/OFF control to either one of the current Millers via the switching element. CONSTITUTION:Current Millers 5, 6 and 7 having different area ratios are inserted in parallel to the path of the signal current; and switching elements 8, 9 and 10 are connected in series to the emitter sharing terminals of Millers 5, 6 and 7 each. Then the ON/OFF control is given to either one of Millers 5, 6 and 7 via the switching element. As a result, the signal level can be controlled easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5910079A JPS55151806A (en) | 1979-05-16 | 1979-05-16 | Signal level control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5910079A JPS55151806A (en) | 1979-05-16 | 1979-05-16 | Signal level control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55151806A true JPS55151806A (en) | 1980-11-26 |
Family
ID=13103567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5910079A Pending JPS55151806A (en) | 1979-05-16 | 1979-05-16 | Signal level control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55151806A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63178610A (en) * | 1987-01-19 | 1988-07-22 | Nec Corp | Escalating alert circuit |
US5321746A (en) * | 1991-02-28 | 1994-06-14 | Motorola, Inc. | Adjustable gain range current mirror |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4810458U (en) * | 1971-06-17 | 1973-02-05 |
-
1979
- 1979-05-16 JP JP5910079A patent/JPS55151806A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4810458U (en) * | 1971-06-17 | 1973-02-05 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63178610A (en) * | 1987-01-19 | 1988-07-22 | Nec Corp | Escalating alert circuit |
US5321746A (en) * | 1991-02-28 | 1994-06-14 | Motorola, Inc. | Adjustable gain range current mirror |
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