JPS56164425A - Bus driving circuit - Google Patents

Bus driving circuit

Info

Publication number
JPS56164425A
JPS56164425A JP6736980A JP6736980A JPS56164425A JP S56164425 A JPS56164425 A JP S56164425A JP 6736980 A JP6736980 A JP 6736980A JP 6736980 A JP6736980 A JP 6736980A JP S56164425 A JPS56164425 A JP S56164425A
Authority
JP
Japan
Prior art keywords
ffs
driving circuit
bus driving
elements
scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6736980A
Other languages
Japanese (ja)
Inventor
Akira Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6736980A priority Critical patent/JPS56164425A/en
Publication of JPS56164425A publication Critical patent/JPS56164425A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To make the operation of a driving circuit stable, by preventing the value of a series of FFs from being applied to bus driving elements at the same time, through the provision of gate circuits between FFs in the bus driving circuit having scan-in/-out functions and control input terminals. CONSTITUTION:AND gates 5-1-5-4 are connected between control input terminals 3-1-3-4 of bus driving elements 2-1-2-4 of a bus driving circuit having scan-in/ -out functions and FFs 4-1-4-4 which shift the scan-in data sequentially. One of the gates 5-1-5-4 is connected in common, and the other is connected to the output of the FF4-1-4-4, respectively. Further, while test data are transferred with the FFs 4-1-4-4, the terminal P in common connection is made to 0 state to prevent the value of the FFs 4-1-4-4 from being fed to the terminals 3-1-3-4 of the elements 2-1-2-4, and the elements 2-1-2-4 are avoided from being driven at the same time, allowing to obtain stable operation.
JP6736980A 1980-05-21 1980-05-21 Bus driving circuit Pending JPS56164425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6736980A JPS56164425A (en) 1980-05-21 1980-05-21 Bus driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6736980A JPS56164425A (en) 1980-05-21 1980-05-21 Bus driving circuit

Publications (1)

Publication Number Publication Date
JPS56164425A true JPS56164425A (en) 1981-12-17

Family

ID=13343022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6736980A Pending JPS56164425A (en) 1980-05-21 1980-05-21 Bus driving circuit

Country Status (1)

Country Link
JP (1) JPS56164425A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61218963A (en) * 1985-03-26 1986-09-29 Toshiba Corp Logic circuit
JPH0365670A (en) * 1989-08-02 1991-03-20 Mitsubishi Electric Corp Integrated circuit device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61218963A (en) * 1985-03-26 1986-09-29 Toshiba Corp Logic circuit
JPH0365670A (en) * 1989-08-02 1991-03-20 Mitsubishi Electric Corp Integrated circuit device
US5911039A (en) * 1989-08-02 1999-06-08 Mitsubishi Denki Kabushiki Kaisha Integrated circuit device comprising a plurality of functional modules each performing predetermined function

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