JPS5789155A - Integrated logical operation circuit - Google Patents
Integrated logical operation circuitInfo
- Publication number
- JPS5789155A JPS5789155A JP55166076A JP16607680A JPS5789155A JP S5789155 A JPS5789155 A JP S5789155A JP 55166076 A JP55166076 A JP 55166076A JP 16607680 A JP16607680 A JP 16607680A JP S5789155 A JPS5789155 A JP S5789155A
- Authority
- JP
- Japan
- Prior art keywords
- input
- ffs
- terminal
- designation
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318555—Control logic
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To easily perform testings on a package loaded on the titled circuit by installing a means which forms a shift register which connects plural FF circuits in tandem in response to shift designation inputs, and freely reading or setting input side data and output side data. CONSTITUTION:Normal input terminals 5-1-5-N and normal output terminals 8-1-8-L are installed to the main body of an integrated logical operation circuit 1. Input side FFs 4-1-4-N and output side FFs 7-1-7-L are respectively connected to each terminal 5-1-5-N and 8-1-8-L, and, when a test designation input is given to a test mode control terminal 10, the FFs 4-1-4-N and 7-1-7-L are slowly advanced in synchronizing to the clock of a clock signal input terminal 11. When no designation input is given to the terminal 10, the input signal is passed under the same condition. Moreover, in response to a designation input from a shift mode control terminal 9, FFs 4-1-4-N and 7-1-7-L are connected in tandem, and they operate as a shift register to make the test of an internal circuit 2 easier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55166076A JPS5789155A (en) | 1980-11-25 | 1980-11-25 | Integrated logical operation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55166076A JPS5789155A (en) | 1980-11-25 | 1980-11-25 | Integrated logical operation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5789155A true JPS5789155A (en) | 1982-06-03 |
JPS6161428B2 JPS6161428B2 (en) | 1986-12-25 |
Family
ID=15824528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55166076A Granted JPS5789155A (en) | 1980-11-25 | 1980-11-25 | Integrated logical operation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5789155A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58207650A (en) * | 1982-04-20 | 1983-12-03 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Integrated circuit mounting structure |
JPS62126367A (en) * | 1985-11-26 | 1987-06-08 | Nec Corp | Logical integrated circuit |
JPH0317577A (en) * | 1989-06-14 | 1991-01-25 | Matsushita Electron Corp | Test circuit of semiconductor integrated circuit apparatus |
-
1980
- 1980-11-25 JP JP55166076A patent/JPS5789155A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58207650A (en) * | 1982-04-20 | 1983-12-03 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Integrated circuit mounting structure |
JPS62126367A (en) * | 1985-11-26 | 1987-06-08 | Nec Corp | Logical integrated circuit |
JPH0317577A (en) * | 1989-06-14 | 1991-01-25 | Matsushita Electron Corp | Test circuit of semiconductor integrated circuit apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPS6161428B2 (en) | 1986-12-25 |
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