JPS6413152U - - Google Patents
Info
- Publication number
- JPS6413152U JPS6413152U JP10796387U JP10796387U JPS6413152U JP S6413152 U JPS6413152 U JP S6413152U JP 10796387 U JP10796387 U JP 10796387U JP 10796387 U JP10796387 U JP 10796387U JP S6413152 U JPS6413152 U JP S6413152U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- plated
- package
- lsi package
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007747 plating Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の実施例の縦断面図、第２図は
本考案品の使用状況を示す側面図、第３図は表面
実装の全体を示す斜視図、第４図は従来のリード
の縦断面図、第５図はその使用状況の側面図であ
る。
１……プリント基板、２，２′……ＬＳＩパツ
ケージ、３……パツケージ基板、４，４′……リ
ード、５……パツド、６，６′……半田、７……
素材、８……第１めつき、９，９′……第２めつ
き。
Fig. 1 is a longitudinal cross-sectional view of an embodiment of the present invention, Fig. 2 is a side view showing how the inventive product is used, Fig. 3 is a perspective view showing the entire surface mounting system, and Fig. 4 is a conventional lead. The longitudinal cross-sectional view and FIG. 5 are side views of the state of use. 1... Printed circuit board, 2, 2'... LSI package, 3... Package board, 4, 4'... Lead, 5... Pad, 6, 6'... Solder, 7...
Material, 8...1st plating, 9,9'...2nd plating.
Claims (1)
ージのパツケージ基板から突出したリードの構造
において、このリードの素材の全表面に半田付け
性の悪い材料をめつきし、その上にリード先端部
のみに半田付け性の良い材料をめつきしたことを
特徴とするＬＳＩパツケージのリード構造。 In the structure of the leads that protrude from the package board of an LSI package that is surface mounted on a printed circuit board, the entire surface of the lead material is plated with a material that has poor solderability, and then only the tip of the lead is soldered. The lead structure of the LSI package is characterized by being plated with a material with good properties.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987107963U JPH0625017Y2 (en) | 1987-07-14 | 1987-07-14 | LSI package lead structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987107963U JPH0625017Y2 (en) | 1987-07-14 | 1987-07-14 | LSI package lead structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6413152U true JPS6413152U (en) | 1989-01-24 |
| JPH0625017Y2 JPH0625017Y2 (en) | 1994-06-29 |
Family
ID=31342853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987107963U Expired - Lifetime JPH0625017Y2 (en) | 1987-07-14 | 1987-07-14 | LSI package lead structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0625017Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0372662A (en) * | 1989-05-10 | 1991-03-27 | Hitachi Ltd | Lead frame and semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60154545A (en) * | 1984-01-23 | 1985-08-14 | Nec Corp | Semiconductor device |
-
1987
- 1987-07-14 JP JP1987107963U patent/JPH0625017Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60154545A (en) * | 1984-01-23 | 1985-08-14 | Nec Corp | Semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0372662A (en) * | 1989-05-10 | 1991-03-27 | Hitachi Ltd | Lead frame and semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0625017Y2 (en) | 1994-06-29 |