JPS6410634A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6410634A
JPS6410634A JP62165366A JP16536687A JPS6410634A JP S6410634 A JPS6410634 A JP S6410634A JP 62165366 A JP62165366 A JP 62165366A JP 16536687 A JP16536687 A JP 16536687A JP S6410634 A JPS6410634 A JP S6410634A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
electrode
wiring board
diameter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62165366A
Other languages
Japanese (ja)
Inventor
Toshitada Nezu
Ryuji Takenaka
Haruhiko Imada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP62165366A priority Critical patent/JPS6410634A/en
Publication of JPS6410634A publication Critical patent/JPS6410634A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To remove a semiconductor integrated circuit from a wiring board without causing a thermal influence due to mechanical traction or shear by a method wherein a diameter of an electrode on the side of the wiring board is made larger than that of an electrode on the side of the semiconductor integrated circuit. CONSTITUTION:In a semiconductor integrated circuit device where a connection part between a semiconductor integrated circuit 1 and a wiring board 3 is brazed by a phase-down bonding method, a diameter of an electrode 4 on the side of the wiring board 3 is made larger than that of an electrode 2 of the semicondcutor integrated circuit 1 while a tolerance value due to a production process of the wiring board 3 and another tolerance value due to the production process of the diameter 2 on the side of the semiconductor integrated circuit 1 are included. By this setup, when the semiconductor integrated circuit 1 is removed from the wiring board 3, a stress due to mechanical traction or shear is concentrated on the electrode on the side of the semiconductor integrated circuit; the electrode of the semiconductor integrated circuit is cut; accordingly, the semiconductor integrated circuit can be removed without damaging the electrode on the side of the wiring board.
JP62165366A 1987-07-03 1987-07-03 Semiconductor integrated circuit device Pending JPS6410634A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62165366A JPS6410634A (en) 1987-07-03 1987-07-03 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62165366A JPS6410634A (en) 1987-07-03 1987-07-03 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6410634A true JPS6410634A (en) 1989-01-13

Family

ID=15811003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62165366A Pending JPS6410634A (en) 1987-07-03 1987-07-03 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6410634A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5973406A (en) * 1996-08-26 1999-10-26 Hitachi, Ltd. Electronic device bonding method and electronic circuit apparatus
US6227436B1 (en) 1990-02-19 2001-05-08 Hitachi, Ltd. Method of fabricating an electronic circuit device and apparatus for performing the method
US6471115B1 (en) 1990-02-19 2002-10-29 Hitachi, Ltd. Process for manufacturing electronic circuit devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6227436B1 (en) 1990-02-19 2001-05-08 Hitachi, Ltd. Method of fabricating an electronic circuit device and apparatus for performing the method
US6471115B1 (en) 1990-02-19 2002-10-29 Hitachi, Ltd. Process for manufacturing electronic circuit devices
US5973406A (en) * 1996-08-26 1999-10-26 Hitachi, Ltd. Electronic device bonding method and electronic circuit apparatus

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