JPS6386462A - ソリツド・ステ−ト・リレ−の製造方法 - Google Patents
ソリツド・ステ−ト・リレ−の製造方法Info
- Publication number
- JPS6386462A JPS6386462A JP61232883A JP23288386A JPS6386462A JP S6386462 A JPS6386462 A JP S6386462A JP 61232883 A JP61232883 A JP 61232883A JP 23288386 A JP23288386 A JP 23288386A JP S6386462 A JPS6386462 A JP S6386462A
- Authority
- JP
- Japan
- Prior art keywords
- frame
- circuit board
- printed circuit
- heat spreader
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000007787 solid Substances 0.000 title claims description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000000758 substrate Substances 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 12
- 229910000679 solder Inorganic materials 0.000 abstract description 4
- 239000011295 pitch Substances 0.000 abstract 5
- 239000004593 Epoxy Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61232883A JPS6386462A (ja) | 1986-09-29 | 1986-09-29 | ソリツド・ステ−ト・リレ−の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61232883A JPS6386462A (ja) | 1986-09-29 | 1986-09-29 | ソリツド・ステ−ト・リレ−の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6386462A true JPS6386462A (ja) | 1988-04-16 |
JPH0579176B2 JPH0579176B2 (enrdf_load_stackoverflow) | 1993-11-01 |
Family
ID=16946333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61232883A Granted JPS6386462A (ja) | 1986-09-29 | 1986-09-29 | ソリツド・ステ−ト・リレ−の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6386462A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2078171A2 (es) * | 1993-12-28 | 1995-12-01 | Smartpack Tecnologia S A | Procedimiento de fabricacion de modulos de potencia con elementos semiconductores. |
US11688823B2 (en) | 2018-11-21 | 2023-06-27 | Kabushiki Kaisha Toshiba | Photocoupler |
-
1986
- 1986-09-29 JP JP61232883A patent/JPS6386462A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2078171A2 (es) * | 1993-12-28 | 1995-12-01 | Smartpack Tecnologia S A | Procedimiento de fabricacion de modulos de potencia con elementos semiconductores. |
US11688823B2 (en) | 2018-11-21 | 2023-06-27 | Kabushiki Kaisha Toshiba | Photocoupler |
Also Published As
Publication number | Publication date |
---|---|
JPH0579176B2 (enrdf_load_stackoverflow) | 1993-11-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |