JPS6362337A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6362337A
JPS6362337A JP61208170A JP20817086A JPS6362337A JP S6362337 A JPS6362337 A JP S6362337A JP 61208170 A JP61208170 A JP 61208170A JP 20817086 A JP20817086 A JP 20817086A JP S6362337 A JPS6362337 A JP S6362337A
Authority
JP
Japan
Prior art keywords
pad
metal wire
fine metal
bonding
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61208170A
Other languages
English (en)
Inventor
Takeshi Hasegawa
毅 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61208170A priority Critical patent/JPS6362337A/ja
Publication of JPS6362337A publication Critical patent/JPS6362337A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • H01L2224/05558Shape in side view conformal layer on a patterned surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置に関し、特に半導体基板上のボン
ディングパッドの構造に関する。
〔従来の技術〕
従来、半導体装置のボンディングパッドは、第3図に示
すように、半導体基板2上にシリコン酸化膜3を介して
形成されたアルミニウム膜から構成されており、基板外
部との結線を行う為に、ボンディングパッド(以下単に
パッドという)4A上に金属細線5を超音波又は加熱に
より圧着させている。
〔発明が解決しようとする問題点〕
上述した従来のパッド4Aは平に形成されているため、
金属細線5を圧着させる場合は、金属細線5のパッド4
A上での圧着位置を正確に決めなければならない。
例えば第3図に示したように、金属細線5の圧着位置が
中心部よりずれ、パッド上の金属細線5の圧着部6が点
線で示した位置になると、自己整合的に圧着位置を修正
できない為に、圧着部6Aがパッド4Aの周辺部の回路
の保護膜1に傷を付け、ひどい場合には、回路の保護膜
1を破壊したり、更に圧着部6Aとパッド4Aとの接続
面積が少くなって金属細線5の接続が不完全となり、半
導体装置の信頼性を劣化させるという欠点があった。
本発明の目的は、金属細線との接続を正確に行うことの
できるボンディングパッドを有する信頼性の高い半導体
装置を提供することにある。
〔問題点を解決するための手段〕
本発明の半導体装置は、半導体装置上に絶縁膜を介して
設けられたボンディングパッドと、前記ボンディングパ
ッドに圧着された金属細線とを有する半導体装置におい
て、前記ボンディングパッドは凹状に形成されているも
のである。
〔実施例〕
次に、本発明の実施例について図面を参照して説明する
第1図は本発明の第1の実施例の断面図である。
第1図において、半導体基板2上に形成されたシリコン
酸化膜3は階段状に形成されており、この上に形成され
たアルミニウムからなるパッド4は凹状に形成されてい
る。尚1はリンケイ酸ガラス等からなる保護膜である。
このように構成されたパッド4に金属細線を圧着する場
合、位置決め精度が悪く金属細線5がパッド4の周辺部
へ当った場合でも、金属細線5はパッド4の傾斜部より
中心部の底部に導びかれるため、中心部に圧着部6が形
成される。従って、金属細線5とパッド4との接続部の
面積は小さく′なることはなく、接続は完全なものとな
る。更に圧着部6がパッドの4の中心部に形成されるこ
とから保護膜1の破壊は防止される。
尚、階段状の酸化膜3の形成は複数回のホトリソグラフ
ィ工程を必要とするが、半導体装置の製造工程における
他のホトリソグラフィ工程を利用することにより、特別
に工程を設ける必要はない。
第2図は本発明の第2の実施例の断面図であり、第1図
に示した第1の実施例と異なる所は、酸化膜3のパッド
4が形成される所分がゆるやかな曲面を有する凹状に形
成されていることである。
このように、曲面を有する凹状の酸化膜3上にアルミニ
ウムを被着し凹状のパッド4Bを形成した場合、第1図
の場合に比ベアルミニウムの被覆性が良くなると共に、
金属細線5がパッド4Bの周辺部に当っても、金属線&
15の圧着部6を、よりスムーズにパッド4Bの底部に
導くことができる。
〔発明の効果〕
以上説明したように本発明は、ボンディングパッドを凹
状に形成することにより、このボンディングパッドに圧
着される金属細線の圧着部は、常にボンディングパッド
の中央部に形成されるため、ボンディングパッドと金属
細線の接続は完全になるという効果がある。従って半導
体装置の信頼性は向上したものとなる。
【図面の簡単な説明】
第1図は本発明第1の実施例の断面図、第2図は本発明
の第2の実施例の断面図、第3図は従来の半導体装置の
断面図である。

Claims (1)

    【特許請求の範囲】
  1. 半導体基体上に絶縁膜を介して設けられたボンディング
    パッドと、前記ボンディングパッドに圧着された金属細
    線とを有する半導体装置において、前記ボンディングパ
    ッドは凹状に形成されていることを特徴とする半導体装
    置。
JP61208170A 1986-09-03 1986-09-03 半導体装置 Pending JPS6362337A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61208170A JPS6362337A (ja) 1986-09-03 1986-09-03 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61208170A JPS6362337A (ja) 1986-09-03 1986-09-03 半導体装置

Publications (1)

Publication Number Publication Date
JPS6362337A true JPS6362337A (ja) 1988-03-18

Family

ID=16551816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61208170A Pending JPS6362337A (ja) 1986-09-03 1986-09-03 半導体装置

Country Status (1)

Country Link
JP (1) JPS6362337A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2221862A1 (en) * 2007-11-16 2010-08-25 Toyota Jidosha Kabushiki Kaisha Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072253A (ja) * 1983-09-28 1985-04-24 Oki Electric Ind Co Ltd 半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072253A (ja) * 1983-09-28 1985-04-24 Oki Electric Ind Co Ltd 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2221862A1 (en) * 2007-11-16 2010-08-25 Toyota Jidosha Kabushiki Kaisha Semiconductor device
EP2221862A4 (en) * 2007-11-16 2013-11-27 Toyota Motor Co Ltd SEMICONDUCTOR COMPONENT
US8674511B2 (en) 2007-11-16 2014-03-18 Toyota Jidosha Kabushiki Kaisha Method of forming a semiconductor device with a contact pad on a sloped silicon dioxide surface

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