JPS6353577B2 - - Google Patents

Info

Publication number
JPS6353577B2
JPS6353577B2 JP58035972A JP3597283A JPS6353577B2 JP S6353577 B2 JPS6353577 B2 JP S6353577B2 JP 58035972 A JP58035972 A JP 58035972A JP 3597283 A JP3597283 A JP 3597283A JP S6353577 B2 JPS6353577 B2 JP S6353577B2
Authority
JP
Japan
Prior art keywords
bus
bus occupancy
latch
register
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58035972A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59161719A (ja
Inventor
Shoji Yamaguchi
Masakazu Okada
Seiichi Yasumoto
Hitoshi Fushimi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3597283A priority Critical patent/JPS59161719A/ja
Publication of JPS59161719A publication Critical patent/JPS59161719A/ja
Publication of JPS6353577B2 publication Critical patent/JPS6353577B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
JP3597283A 1983-03-07 1983-03-07 バス占有制御装置 Granted JPS59161719A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3597283A JPS59161719A (ja) 1983-03-07 1983-03-07 バス占有制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3597283A JPS59161719A (ja) 1983-03-07 1983-03-07 バス占有制御装置

Publications (2)

Publication Number Publication Date
JPS59161719A JPS59161719A (ja) 1984-09-12
JPS6353577B2 true JPS6353577B2 (US07816562-20101019-C00012.png) 1988-10-24

Family

ID=12456827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3597283A Granted JPS59161719A (ja) 1983-03-07 1983-03-07 バス占有制御装置

Country Status (1)

Country Link
JP (1) JPS59161719A (US07816562-20101019-C00012.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4612542A (en) * 1984-12-20 1986-09-16 Honeywell Inc. Apparatus for arbitrating between a plurality of requestor elements

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5416334B2 (US07816562-20101019-C00012.png) * 1975-10-22 1979-06-21
JPS5566016A (en) * 1978-11-13 1980-05-19 Matsushita Electric Ind Co Ltd Signal priority level determination circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5416334U (US07816562-20101019-C00012.png) * 1977-07-06 1979-02-02

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5416334B2 (US07816562-20101019-C00012.png) * 1975-10-22 1979-06-21
JPS5566016A (en) * 1978-11-13 1980-05-19 Matsushita Electric Ind Co Ltd Signal priority level determination circuit

Also Published As

Publication number Publication date
JPS59161719A (ja) 1984-09-12

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