JPS6353572B2 - - Google Patents
Info
- Publication number
- JPS6353572B2 JPS6353572B2 JP54116533A JP11653379A JPS6353572B2 JP S6353572 B2 JPS6353572 B2 JP S6353572B2 JP 54116533 A JP54116533 A JP 54116533A JP 11653379 A JP11653379 A JP 11653379A JP S6353572 B2 JPS6353572 B2 JP S6353572B2
- Authority
- JP
- Japan
- Prior art keywords
- bit
- program counter
- gates
- stage
- stack register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
Landscapes
- Executing Machine-Instructions (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11653379A JPS5641577A (en) | 1979-09-11 | 1979-09-11 | Stack register circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11653379A JPS5641577A (en) | 1979-09-11 | 1979-09-11 | Stack register circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5641577A JPS5641577A (en) | 1981-04-18 |
| JPS6353572B2 true JPS6353572B2 (enrdf_load_stackoverflow) | 1988-10-24 |
Family
ID=14689474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11653379A Granted JPS5641577A (en) | 1979-09-11 | 1979-09-11 | Stack register circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5641577A (enrdf_load_stackoverflow) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6051632A (ja) * | 1983-08-31 | 1985-03-23 | Furukawa Electric Co Ltd:The | 光フアイバの製造方法 |
| JPH0717400B2 (ja) * | 1983-08-31 | 1995-03-01 | 古河電気工業株式会社 | 光フアイバの製造方法 |
| JPS63316134A (ja) * | 1987-06-18 | 1988-12-23 | Toshiba Corp | 半導体集積回路 |
| DE69034028T2 (de) * | 1989-05-04 | 2003-10-09 | Texas Instruments Inc., Dallas | Verfahren und System zur Bestimmung von Min/Max Werten |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5920196B2 (ja) * | 1976-07-28 | 1984-05-11 | 株式会社東芝 | 双方向性シフトレジスタ |
-
1979
- 1979-09-11 JP JP11653379A patent/JPS5641577A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5641577A (en) | 1981-04-18 |
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