JPS634945B2 - - Google Patents

Info

Publication number
JPS634945B2
JPS634945B2 JP57054892A JP5489282A JPS634945B2 JP S634945 B2 JPS634945 B2 JP S634945B2 JP 57054892 A JP57054892 A JP 57054892A JP 5489282 A JP5489282 A JP 5489282A JP S634945 B2 JPS634945 B2 JP S634945B2
Authority
JP
Japan
Prior art keywords
thin film
metal thin
plating
metal
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57054892A
Other languages
English (en)
Other versions
JPS58171838A (ja
Inventor
Eiji Tsukiide
Tomoichi Oku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57054892A priority Critical patent/JPS58171838A/ja
Publication of JPS58171838A publication Critical patent/JPS58171838A/ja
Publication of JPS634945B2 publication Critical patent/JPS634945B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/4952Additional leads the additional leads being a bump or a wire
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は樹脂モールドされて成る半導体装置に
使用するリードフレームの構造に関する。
従来、樹脂封止型半導体装置を製造する場合、
第1図の半導体装置の断面図に示すように、金属
製の半導体装置用リードフレーム(以下単にリー
ドフレームと称す)の半導体ペレツト搭載部3に
半導体ペレツト4をボンデイングし、かつこのペ
レツトの各電極とリードフレームを形成する各内
部リード1の先端部とを金ワイヤ5でそれぞれ接
続し、半導体ペレツト4を中心に樹脂6でモール
ドして半導体装置を製造している。
ところで、上記従来のリードフレームは、あら
かじめ半導体ペレツト搭載部3及び内部リード1
の先端部に金または銀の金属薄膜をメツク等によ
り部分的に施しておく必要がある。
即ち、半導体ペレツトをボンデイングする場合
には、金メツキまたは金テープを置いた銀メツキ
上に、半導体ペレツト裏面をこすりつけてAu―
Si合金、Ag―Au―Si合金を作り、この合金によ
つて半導体ペレツトをリードフレームに固着し、
また金ワイヤによるボンデイングを行つている。
そして、このリードフレームの部分メツキは、弾
力性のある樹脂ゴムを素材としたメツキマスク用
治具により、リードフレームの部分メツキエリア
以外をシールすることで成されている。しかし、
リードフレームは、小さい上に高精度なメツキエ
リアを必要とするにもかかわらず、そのエリアを
決める位置精度は、メツキマスク用治具の構造上
また治具素材の特性上良くないものであつた。即
ちリード側面部へのメツキ液の漏れ、またマスク
用治具の摩耗によるメツキ液の漏れ等により、メ
ツキの金属薄膜がリードフレームの樹脂モールド
領域外にまで出る恐れがあつた。さらに最近の様
に集積度の高い半導体ペレツト(ペレツトサイズ
が大きい)を搭載するリードフレームは、第2図
の断面図に示すように半導体ペレツト搭載部3が
大きくなることから、その分内部リード1が短か
くなり、そのためメツキの金属薄膜2がいつそう
樹脂モールド外に出易い状態となつていた。
このようにして樹脂モールド外に出たメツキの
金属薄膜は、外部リード処理としての半田デイツ
プ又はSnメツキ等の処理を行つた場合、その処
理被膜のリードフレーム(外部リード)への密着
性を落し、半田付け性も悪くしており、さらに悪
いことにメツキの金属被膜がAgの場合、Agは外
部リード間でマイグレーシヨンを起し、長期にわ
たつて電気特性を一定に保つことを困難にしてい
た。従つて、これらのリードフレームで作られた
半導体装置は信頼度の低いものとなつていた。
本発明の目的はリードフレームの内部に施した
メツキ等による金属薄膜が、樹脂モールド外に出
ないようにした信頼性の高い半導体装置用リード
フレームを提供することにある。
このような目的を達成するために、本発明のリ
ードフレームは、内部リード部の少なくとも表面
側に金属片を固着し、この金属片の表面に金属薄
膜が形成されていることを特徴とするものであ
る。
以下本発明を実施例の図面に基づいて説明す
る。第3図は本発明のリードフレームを用いて作
成された半導体装置の断面図である。金属片7
は、メツキにより形成された金属薄膜2′を有す
る金属板を所定の形状にプレス加工またはエツチ
ング加工して形成し、リードフレームの内部リー
ド1の先端部上面に搭載し固着した。この金属片
7の固着は、固相接合、スポツト溶接などによつ
て容易に行うことができる。又、リードフレーム
の半導体ペレツト搭載部3のメツキ処理は従来と
同様の方法で上記金属片7の搭載前に行つてお
く。半導体ペレツト搭載部3は周囲のリードと隔
離されているため、メツキ時のマスクのシール性
は十分であり、リード部をメツキする方法の時に
起りがちなメツキ領域が広がることと、それによ
つて封止樹脂外領域にメツキ部が出てしまうとい
う欠点は発生しない。それによつて外部リード処
理としての半田デイツプ処理後の部分ハガレ等の
障害は発生しなくなつた。
以上のように、内部リード部に金属片を固着す
ることによつて、半導体ペレツト搭載部3の金属
薄膜2と金属片7の金属薄膜2′の形成がそれぞ
れ別々に行われるため、リードフレーム内部の金
属薄膜(Au又はAg)が樹脂モールド外にはみ出
ることはなく、また金属片7の板厚を自由に変え
ることが可能であり、ワイヤボンデイングの容易
な高さに設計できる。更にこの金属片7に熱伝導
の良い材料を選択し、内部リード部一面に広げる
ことにより、その半導体装置の熱抵抗を低くする
ことができる。従つて本発明のリードフレームを
用いれば信頼性の高い半導体装置となる。
本実施例に示した金属片7の金属薄膜2′は、
メツキによる場合について記述したがこれに限る
ものではなく、固相接合(クラツド材料)による
ものであつてもよい。
又、金属片7は一層のみならず複数層になつて
いても本発明の効果は失わない。
更に金属薄膜2′は表面部に限るものでないこ
とは言うまでもないことである。
【図面の簡単な説明】
第1図、第2図は従来のリードフレームを用い
た半導体装置の断面図であり、第3図は本発明に
係るリードフレームの一実施例を用いた半導体装
置の断面図である。 1……内部リード、2,2′……金属薄膜、3
……半導体ペレツト搭載部、4……半導体ペレツ
ト、5……金ワイヤ、6……樹脂、7……金属
片。

Claims (1)

    【特許請求の範囲】
  1. 1 樹脂封止型の半導体装置に使用するリードフ
    レームにおいて、内部リード部の先端部上面に金
    属片が固着され、この金属片の少なくとも上面に
    は金属薄膜が形成されていることを特徴とする半
    導体装置用リードフレーム。
JP57054892A 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム Granted JPS58171838A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57054892A JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57054892A JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS58171838A JPS58171838A (ja) 1983-10-08
JPS634945B2 true JPS634945B2 (ja) 1988-02-01

Family

ID=12983241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57054892A Granted JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS58171838A (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006018671A1 (en) * 2004-08-19 2006-02-23 Infineon Technologies Ag Mixed wire semiconductor lead frame package
DE102008051491A1 (de) * 2008-10-13 2010-04-29 Tyco Electronics Amp Gmbh Leadframe für elektronische Bauelemente
ITMI20131530A1 (it) 2013-09-17 2015-03-18 St Microelectronics Srl Dispositivo elettronico con elemento di interfaccia bimetallico per wire-bonding
CN106024745A (zh) * 2016-07-01 2016-10-12 长电科技(宿迁)有限公司 一种半导体管脚贴装结构及其焊接方法
CN108493178B (zh) * 2018-02-06 2020-10-20 昆山市品能精密电子有限公司 封装到位的集成电路支架结构及其制造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52129465U (ja) * 1976-03-26 1977-10-01

Also Published As

Publication number Publication date
JPS58171838A (ja) 1983-10-08

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