JPS634945B2 - - Google Patents

Info

Publication number
JPS634945B2
JPS634945B2 JP57054892A JP5489282A JPS634945B2 JP S634945 B2 JPS634945 B2 JP S634945B2 JP 57054892 A JP57054892 A JP 57054892A JP 5489282 A JP5489282 A JP 5489282A JP S634945 B2 JPS634945 B2 JP S634945B2
Authority
JP
Japan
Prior art keywords
lead frame
plating
thin film
lead
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57054892A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58171838A (ja
Inventor
Eiji Tsukiide
Tomoichi Oku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57054892A priority Critical patent/JPS58171838A/ja
Publication of JPS58171838A publication Critical patent/JPS58171838A/ja
Publication of JPS634945B2 publication Critical patent/JPS634945B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/457—
    • H10W70/465—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H10W72/075—
    • H10W72/07511—
    • H10W72/07551—
    • H10W72/50—
    • H10W72/536—
    • H10W72/5363—
    • H10W72/5434—
    • H10W72/5522—
    • H10W72/59—
    • H10W72/884—
    • H10W72/952—
    • H10W74/00—
    • H10W90/736—
    • H10W90/754—
    • H10W90/756—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP57054892A 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム Granted JPS58171838A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57054892A JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57054892A JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS58171838A JPS58171838A (ja) 1983-10-08
JPS634945B2 true JPS634945B2 (index.php) 1988-02-01

Family

ID=12983241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57054892A Granted JPS58171838A (ja) 1982-04-02 1982-04-02 半導体装置用リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS58171838A (index.php)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8105932B2 (en) 2004-08-19 2012-01-31 Infineon Technologies Ag Mixed wire semiconductor lead frame package
DE102008051491A1 (de) 2008-10-13 2010-04-29 Tyco Electronics Amp Gmbh Leadframe für elektronische Bauelemente
ITMI20131530A1 (it) * 2013-09-17 2015-03-18 St Microelectronics Srl Dispositivo elettronico con elemento di interfaccia bimetallico per wire-bonding
CN106024745A (zh) * 2016-07-01 2016-10-12 长电科技（宿迁）有限公司 一种半导体管脚贴装结构及其焊接方法
CN108493178B (zh) * 2018-02-06 2020-10-20 昆山市品能精密电子有限公司 封装到位的集成电路支架结构及其制造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52129465U (index.php) * 1976-03-26 1977-10-01

Also Published As

Publication number Publication date
JPS58171838A (ja) 1983-10-08

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