JPS6324505Y2 - - Google Patents

Info

Publication number
JPS6324505Y2
JPS6324505Y2 JP1985006693U JP669385U JPS6324505Y2 JP S6324505 Y2 JPS6324505 Y2 JP S6324505Y2 JP 1985006693 U JP1985006693 U JP 1985006693U JP 669385 U JP669385 U JP 669385U JP S6324505 Y2 JPS6324505 Y2 JP S6324505Y2
Authority
JP
Japan
Prior art keywords
ram
gate
signal
input
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1985006693U
Other languages
English (en)
Japanese (ja)
Other versions
JPS60150700U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS60150700U publication Critical patent/JPS60150700U/ja
Application granted granted Critical
Publication of JPS6324505Y2 publication Critical patent/JPS6324505Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)
  • Read Only Memory (AREA)
  • Power Sources (AREA)
JP1985006693U 1978-03-09 1985-01-21 電源アップ，ダウン時のｒａｍ保持機能を有するマイクロプロセッサ Granted JPS60150700U (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/884,790 US4145761A (en) 1978-03-09 1978-03-09 Ram retention during power up and power down
US884790 1978-03-09

Publications (2)

Publication Number Publication Date
JPS60150700U JPS60150700U (ja) 1985-10-07
JPS6324505Y2 true JPS6324505Y2 (en, 2012) 1988-07-05

Family

ID=25385398

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2404179A Pending JPS54124942A (en) 1978-03-09 1979-03-01 System having ram retaining function at power up and down time
JP1985006693U Granted JPS60150700U (ja) 1978-03-09 1985-01-21 電源アップ，ダウン時のｒａｍ保持機能を有するマイクロプロセッサ

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2404179A Pending JPS54124942A (en) 1978-03-09 1979-03-01 System having ram retaining function at power up and down time

Country Status (7)

Country Link
US (1) US4145761A (en, 2012)
JP (2) JPS54124942A (en, 2012)
DE (1) DE2905675A1 (en, 2012)
FR (1) FR2419545A1 (en, 2012)
GB (1) GB2016179B (en, 2012)
MY (1) MY8500471A (en, 2012)
SG (1) SG16384G (en, 2012)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4453068A (en) * 1979-05-01 1984-06-05 Rangaire Corporation Induction cook-top system and control
CA1160744A (en) * 1979-05-09 1984-01-17 Jesse T. Quatse Electronic postage meter having improved security and fault tolerance features
US4484307A (en) * 1979-05-09 1984-11-20 F.M.E. Corporation Electronic postage meter having improved security and fault tolerance features
US4247913A (en) * 1979-05-10 1981-01-27 Hiniker Company Protection circuit for storage of volatile data
US4271487A (en) * 1979-11-13 1981-06-02 Ncr Corporation Static volatile/non-volatile ram cell
US4288865A (en) * 1980-02-06 1981-09-08 Mostek Corporation Low-power battery backup circuit for semiconductor memory
US4322807A (en) * 1980-03-07 1982-03-30 The Perkin-Elmer Corporation Safe memory system for a spectrophotometer
US4327410A (en) * 1980-03-26 1982-04-27 Ncr Corporation Processor auto-recovery system
US4323987A (en) * 1980-03-28 1982-04-06 Pitney Bowes Inc. Power failure memory support system
JPS6022438B2 (ja) * 1980-05-06 1985-06-01 松下電器産業株式会社 不揮発性メモリのリフレッシュ方式
JPS5764397A (en) * 1980-10-03 1982-04-19 Olympus Optical Co Ltd Memory device
JPS5769588A (en) * 1980-10-16 1982-04-28 Nec Corp Memort circuit
US4388706A (en) * 1980-12-01 1983-06-14 General Electric Company Memory protection arrangement
JPH0124656Y2 (en, 2012) * 1981-05-18 1989-07-26
JPS5875264A (ja) * 1981-10-29 1983-05-06 Mitsubishi Electric Corp マイクロプロセツサ
US4578774A (en) * 1983-07-18 1986-03-25 Pitney Bowes Inc. System for limiting access to non-volatile memory in electronic postage meters
FR2571870B1 (fr) * 1984-10-15 1987-02-20 Sagem Dispositif de sauvegarde de memoire de microprocesseur.
JPS61125660A (ja) * 1984-11-22 1986-06-13 Toshiba Corp バツテリ−バツクアツプ回路
JP3172214B2 (ja) * 1991-09-30 2001-06-04 富士通株式会社 状態モード設定方式
US5935253A (en) * 1991-10-17 1999-08-10 Intel Corporation Method and apparatus for powering down an integrated circuit having a core that operates at a speed greater than the bus frequency
US5682471A (en) * 1994-10-06 1997-10-28 Billings; Thomas Neal System for transparently storing inputs to non-volatile storage and automatically re-entering them to reconstruct work if volatile memory is lost
US5802132A (en) * 1995-12-29 1998-09-01 Intel Corporation Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme
US5834956A (en) 1995-12-29 1998-11-10 Intel Corporation Core clock correction in a 2/N mode clocking scheme
US5884084A (en) * 1996-10-31 1999-03-16 Intel Corporation Circuit and method for using early reset to prevent CMOS corruption with advanced power supplies
JPH10254587A (ja) * 1997-03-14 1998-09-25 Toshiba Corp コンピュータシステム
US5986962A (en) * 1998-07-23 1999-11-16 International Business Machines Corporation Internal shadow latch
JP2000114935A (ja) * 1998-10-02 2000-04-21 Nec Corp 順序回路
US7259654B2 (en) * 2000-02-28 2007-08-21 Magellan Technology Pty Limited Radio frequency identification transponder
US7248145B2 (en) * 2000-02-28 2007-07-24 Magellan Technology Oty Limited Radio frequency identification transponder
KR100560665B1 (ko) * 2003-07-02 2006-03-16 삼성전자주식회사 독출 방지 기능을 갖는 반도체 메모리 장치
AU2009273748A1 (en) 2008-07-21 2010-01-28 Sato Holdings Corporation A device having data storage

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1440099A (fr) * 1965-04-15 1966-05-27 Labo Cent Telecommunicat Perfectionnements aux mémoires à lecture destructive fonctionnant en mémoires semi-permanentes
US3680061A (en) * 1970-04-30 1972-07-25 Ncr Co Integrated circuit bipolar random access memory system with low stand-by power consumption
DE2121865C3 (de) * 1971-05-04 1983-12-22 Ibm Deutschland Gmbh, 7000 Stuttgart Speicher-Adressierschaltung
US4082966A (en) * 1976-12-27 1978-04-04 Texas Instruments Incorporated Mos detector or sensing circuit

Also Published As

Publication number Publication date
DE2905675C2 (en, 2012) 1988-12-01
MY8500471A (en) 1985-12-31
GB2016179A (en) 1979-09-19
FR2419545A1 (fr) 1979-10-05
FR2419545B1 (en, 2012) 1983-09-09
GB2016179B (en) 1982-11-03
JPS54124942A (en) 1979-09-28
SG16384G (en) 1985-02-15
JPS60150700U (ja) 1985-10-07
DE2905675A1 (de) 1979-09-20
US4145761A (en) 1979-03-20

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