JPS6324343A - Ｉ／ｏアドレスデコ−ド方式 - Google Patents

Ｉ／ｏアドレスデコ−ド方式

Info

Publication number
JPS6324343A
JPS6324343A JP16698186A JP16698186A JPS6324343A JP S6324343 A JPS6324343 A JP S6324343A JP 16698186 A JP16698186 A JP 16698186A JP 16698186 A JP16698186 A JP 16698186A JP S6324343 A JPS6324343 A JP S6324343A
Authority
JP
Japan
Prior art keywords
address
hardware
devices
software
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16698186A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0562786B2 (enrdf_load_stackoverflow
Inventor
Teru Morimoto
森本　輝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16698186A priority Critical patent/JPS6324343A/ja
Publication of JPS6324343A publication Critical patent/JPS6324343A/ja
Publication of JPH0562786B2 publication Critical patent/JPH0562786B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP16698186A 1986-07-16 1986-07-16 Ｉ／ｏアドレスデコ−ド方式 Granted JPS6324343A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16698186A JPS6324343A (ja) 1986-07-16 1986-07-16 Ｉ／ｏアドレスデコ−ド方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16698186A JPS6324343A (ja) 1986-07-16 1986-07-16 Ｉ／ｏアドレスデコ−ド方式

Publications (2)

Publication Number Publication Date
JPS6324343A true JPS6324343A (ja) 1988-02-01
JPH0562786B2 JPH0562786B2 (enrdf_load_stackoverflow) 1993-09-09

Family

ID=15841189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16698186A Granted JPS6324343A (ja) 1986-07-16 1986-07-16 Ｉ／ｏアドレスデコ−ド方式

Country Status (1)

Country Link
JP (1) JPS6324343A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02253460A (ja) * 1989-03-28 1990-10-12 Nec Eng Ltd 制御システム
EP0653711A1 (en) * 1993-10-29 1995-05-17 Advanced Micro Devices, Inc. Direct memory access controller
JPH07183926A (ja) * 1993-12-24 1995-07-21 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk Ｑｐｓｋプリアンブル信号発生器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223831A (ja) * 1982-06-23 1983-12-26 Nec Corp 入出力機器選択方式
JPS60122449A (ja) * 1983-12-07 1985-06-29 Mitsubishi Electric Corp アドレス可変方式の入出力制御装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223831A (ja) * 1982-06-23 1983-12-26 Nec Corp 入出力機器選択方式
JPS60122449A (ja) * 1983-12-07 1985-06-29 Mitsubishi Electric Corp アドレス可変方式の入出力制御装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02253460A (ja) * 1989-03-28 1990-10-12 Nec Eng Ltd 制御システム
EP0653711A1 (en) * 1993-10-29 1995-05-17 Advanced Micro Devices, Inc. Direct memory access controller
JPH07183926A (ja) * 1993-12-24 1995-07-21 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk Ｑｐｓｋプリアンブル信号発生器

Also Published As

Publication number Publication date
JPH0562786B2 (enrdf_load_stackoverflow) 1993-09-09

Similar Documents

Publication Publication Date Title
CA1324835C (en) Modular crossbar interconnection network for data transaction between system units in a multi-processor system
JP2006040275A (ja) パーティション化可能コンピュータにおけるパーティションへの資源割り振り
EP0463855A2 (en) Microcomputer
US6094710A (en) Method and system for increasing system memory bandwidth within a symmetric multiprocessor data-processing system
JPS6324343A (ja) Ｉ／ｏアドレスデコ−ド方式
US10740141B2 (en) Method for managing transactions routing between source equipment and target equipment
JPH0236010B2 (enrdf_load_stackoverflow)
JPH02217925A (ja) マイクロプロセッサ
EP0110972B1 (en) Memory system including instruction word bus
JPS58161191A (ja) 記憶装置
JPH05334235A (ja) データ転送方式
JPH1196107A (ja) リクエスト管理回路
JPH04241047A (ja) アドレス拡張方式
JPH0368046A (ja) メモリアクセス方式
JPS63195748A (ja) 計算機システムのメモリマツプド制御装置
US5696498A (en) Address encoding method and address decoding circuit therefor
JPH01134546A (ja) 演算処理装置
JP3205564B2 (ja) メモリ回路
JPS58168166A (ja) メモリ拡張方式
JPS59144930A (ja) マイクロコンピユ−タ
JPH0264760A (ja) 並列プロセッサシステムのインタフェース装置
JPH02216573A (ja) ２重化メモリ構成方法
JPH07325757A (ja) 記憶管理装置
JPH11238029A (ja) システムバスのｉｏマッピング方法及び方式
JPH04333940A (ja) データ書き込み方式