JPS63170971A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the mobility of a current carrier and to enhance the current drive force and the mutual conductance of a semiconductor device by a method wherein crystal particles inside a polycrystalline silicon substrate are grown and arranged in the same vertical direction as a transistor-activating region which is formed in such a way that the current carrier flows along the interface of the crystal particles. CONSTITUTION:A device incorporates n<+> polycrystalline silicon layers 1, 2 and p<+> polycrystalline silicon layers 3, 4, which form each region for a source, a drain and two gates, as well as n<-> polycrystalline silicon layers 5, 6 which form a channel region. The polycrystalline layers are deposited in succession on an insulating substrate 7; crystal particles are grown in the vertical direction with reference to the insulating substrate 7. That is to say, the crystal particles are grown in such a way that, inside the n<-> polycrystalline layers 5, 6 in the channel region, the interface of the crystal particles runs along their respective channels and that it does not cross the flow of a current carrier. By this method, the opportunity that the current carrier disappears due to the recombination or other forces is reduced; the mutual conductance and the current drive force of a device can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and particularly to the structure of a semiconductor device in which a transistor activation region is formed using polycrystalline silicon.

(Prior Art) Today, as seen in the example of thin film transistors, there is active development of semiconductor devices using substrate materials that replace single crystal silicon. In this case, amonahas or polycrystalline silicon material is usually used as the material to replace single crystal silicon, and the semiconductor element is formed into a so-called lateral structure by following the conventional technology.

(Problem to be Solved by the Invention) However, when polycrystalline silicon is grown on an insulating substrate (e.g. glass), the crystal grains are grown and arranged perpendicularly to the insulating substrate. or holes) cross many crystal grain interfaces. If the structure is such that the current carriers cross many crystal grain boundaries, the mobility of the current carriers decreases, reducing the mutual conductance (gm) and current driving force of the semiconductor device. Therefore, conventional semiconductor devices using a substrate material instead of single-crystal silicon have a weak current driving ability for loads, and thin film transistors are used only in the peripheral driving elements of liquid crystal display devices.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a semiconductor device using a polycrystalline silicon substrate with improved mutual conductance and current driving force.

[Structure of the invention]

According to the present invention, a semiconductor device includes a polycrystalline silicon substrate and a vertical structure element in which a transistor activation region is vertically formed in the polycrystalline silicon substrate, and the polycrystalline silicon substrate is crystalline. Each of the grain boundaries is formed by crystal grains grown and aligned in the vertical direction without intersecting the flow of current carriers in the transistor activation region.

(Means for Solving the Problems) That is, according to the present invention, a transistor element of a polycrystalline silicon substrate semiconductor device is formed in a vertical structure, and the crystal grains of the polycrystalline silicon substrate have current carriers located at the crystal grain interface. It is grown and arranged in the same vertical direction as the transistor activation region to be formed, so that it flows along.

(Function) At this time, the crystal grains of polycrystalline silicon do not cross each grain interface with respect to the flow of current carriers in the transistor activation region, so the mobility of current carriers is increased and the current driving force of the semiconductor device is increased. and acts to improve mutual conductance. The present invention will be described in detail below with reference to the drawings.

(Embodiment) FIG. 1 is a sectional view showing an embodiment of the present invention, in which the device structure is a field effect transistor with the vertical direction. According to this embodiment, the semiconductor device of the present invention includes n-polycrystalline silicon 37 layers 1 and 2 and p-polycrystalline silicon layers 3 and 4 forming the source, drain, and two gate regions,
n-polycrystalline silicon layers 5 and 6 forming channel regions.

Here, S, G, and D are lead electrodes from the source, gate, and drain regions, 7 is an insulating substrate made of glass material, and 8, 9, 10, and 11 are silicon oxide insulators, respectively.

According to this embodiment, the polycrystalline silicon layer is formed by being sequentially deposited on the insulating substrate 7, so that the crystal grains are grown in a direction perpendicular to the insulating substrate 7.

That is, the n-polycrystalline silicon layer 5°6 in the channel region
Within the channel, grain boundaries grow in the direction along the channel so that they do not intersect with the flow of current carriers (electrons) (indicated by arrows). Therefore, the chances of current carriers (electrons) disappearing due to recombination or the like can be reduced, and the mutual conductance (gm) and current driving force of the device can be improved.

FIG. 2 is a sectional view showing another embodiment of the present invention, showing a structure in which two vertical field effect transistors made of polycrystalline silicon are stacked in multiple stages.

According to this embodiment, transistor elements A and B having exactly the same structure as in FIG. 1 are formed in a two-layer structure with an interlayer insulating film 12 interposed therebetween. Since the semiconductor device of the present invention can be formed almost entirely from polycrystalline silicon, it can easily have a three-dimensional configuration in which a plurality of transistor elements are stacked as in this embodiment. The advantage of having a three-dimensional configuration can be easily realized by combining with other commonly used transistor elements.

FIG. 3 is a sectional view showing another embodiment of the present invention.
(MOS using a single crystal silicon substrate, which is usually used as a layer)
This figure shows a three-dimensional structure formed of transistors, in which the second and subsequent layers are vertical field effect transistors according to the present invention. Here, C is a normal M using a single crystal silicon substrate.
An OS transistor is shown, and 13 represents its single crystal silicon substrate.

Although the present invention has been described above only when applied to a vertical field effect transistor, it can also be easily applied to any device having a vertical structure, such as a vertical bipolar transistor. Thus, it is possible to obtain a polycrystalline silicon semiconductor device with improved mutual conductance and improved current driving power. Therefore, the three-dimensional configuration shown in FIGS. 2 and 3 can be used to form any number of semiconductor electronic circuits by combining the types of transistors.

〔Effect of the invention〕

As described above in detail, the present invention has the remarkable effect of improving the mutual conductance of a polycrystalline silicon semiconductor device and the current driving force characteristics to an external circuit, and also significantly facilitating three-dimensional configuration. .

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the invention, FIG. 2 is a sectional view showing another embodiment of the invention, and FIG. 3 is a sectional view showing still another embodiment of the invention. 1... N+ polycrystalline silicon layer forming a source region, 2... N+ polycrystalline silicon layer forming a drain region, 3, 4... Forming a gate region n+ polycrystalline silicon layer, 5, 6... n- polycrystalline silicon layer forming channel region, 7...
Insulating substrates made of glass material, 8, 9, 10.11...
...Silicon oxide insulating film, 12...Interlayer insulating film, 13...Single crystal silicon substrate, S...
...Source extraction electrode, G...Gate extraction electrode,
D...Drain extraction electrode, A...First
Layered vertical field effect transistor element, B...Second
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Claims (1)

[Claims] The polycrystalline silicon substrate includes a polycrystalline silicon substrate and a vertical structure element that forms a transistor activation region in a vertical direction in the polycrystalline silicon substrate, and the polycrystalline silicon substrate has a crystal grain interface in which each of the transistor activation regions is formed. A semiconductor device characterized in that the semiconductor device is formed of crystal grains grown and arranged in the vertical direction without intersecting the flow of current carriers.