JPS625661A - Thin film transistor - Google Patents

Abstract

PURPOSE:To increase the capacity of a display device by forming a conductive electrode through an insulating film on a glasslike substrate, forming a polycrystalline Si active layer thereon, further forming a thin insulating film and a conductive electrode thereon to use the both electrodes as a common gate, and forming a channel in the polycrystalline Si active layer. CONSTITUTION:A conductive layer 15' is formed through an insulating film 12 on a glasslike substrate 11, a thin insulating film 12' is deposited thereon, a polycrystalline Si is deposited thereon, boron is doped to form an active layer 13. A high density impurity is doped on part of the layer to form N<+> type impurity layers 14, 14'. A thin insulating film 12' is formed thereon, and a conductive layer 15 is formed thereon. Thereafter, a passivation film is formed on the entire surface, only source and drain are opened, aluminum is deposited to lead an electrode 16. Thus, the capacity of a display device driven by an active matrix TFT by the high speed operation of a driver can be increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor that is a basic component of a TPT and its peripheral circuits for driving display devices such as LC, ]li:L, and VF.

[Conventional technology]

In recent years, as display devices such as EL%LC have become larger in area, studies have begun to consider driving systems using active matrix TPT. In this method, in addition to the TPT provided for each cell, a driver is required to drive the X%Y electrode lines, but these are integrated into an IC on the glass substrate together with the TPT. is desirable in terms of cost. These TPTs and drivers can be made larger by 5.9 mt, and the faster they operate, the better the performance of the display device will be. for example,
If the operating speed of the driver can be improved, it becomes possible to increase the area. Furthermore, if the gm (mutual conductance) of the TPT can be increased, the w/L of the transistor can be reduced, and the aperture ratio of one cell can be improved.

FIG. 2 shows the structure of a thin film transistor constructed using conventional polycrystalline Sl. The transistor includes a polycrystalline 81 active layer 13 provided on a glass substrate 11 via an insulating film 12, an n+ impurity layer 14 serving as a source/drain,
14' and a thin insulating film 12' to make an ohmic contact with the polycrystalline S14 conductive layer 15 serving as the gate, and the source/drain impurity layer 14 and 14'. It is composed of an electrode 16. In this transistor, a channel is formed in the active layer 13 under the y-t and conductivity is controlled by the gate potential.

The TPT is made up of such transistors, and the driver is made up of all the plurality of such transistors.

The electron mobility μ6 in the above transistor is determined by the crystallinity of the polycrystalline Si 15 used in the active layer.
-dope polycrystalline Sl is used, at most 10
The value is around Crn%·see.

[Problem that the invention seeks to solve]

By the way, such a low μ. In order to construct a TFT i using transistors having the following characteristics, the W/L (channel width/channel length) of the transistor per cell must be increased to obtain the required switching speed. Therefore, in the conventional example, the area occupied by the transistor portion within one cell increases, resulting in a decrease in the aperture ratio of the display cell such as a liquid crystal, and deterioration in contrast.

In particular, in a TPT for driving EL, since it is necessary to configure two transistors, the aperture ratio decreases significantly.

Furthermore, when the entire driver is configured using the above-mentioned transistors, there is a problem that high-speed driving is difficult because gm is small. In order to perform high-speed driving, w/L,' should be increased or μ. There are ways to improve 6 w/L.
If 'x is increased, the area of the region constituting the transistor increases.
Since the area where defects and defects can occur increases, the yield of ICs decreases. Also, the other μ.

In order to improve the quality of transistors (as long as transistors are fabricated on glass-like substrates), it is necessary to perform a low-temperature heat treatment process, which is currently not easy.

The purpose of the present invention is to eliminate such conventional drawbacks and to
An object of the present invention is to provide a thin film transistor that can increase the capacity of a display device by increasing the capacity of the display device.

[Means for solving problems]

The present invention provides a thin film transistor configured on a glass-like substrate, in which a first conductive electrode is provided on the glass-like substrate with an insulating film interposed therebetween, and a first conductive electrode is provided on the glass-like substrate through a first insulating thin film. A polycrystalline Si layer formed of source and drain impurity layers is provided, and a second insulating thin film having a thickness similar to that of the first insulating thin film is provided thereon; A second conductive electrode is provided through the first conductive electrode, the first and second conductive electrodes are all common (ff-), and a channel is entirely formed in the polycrystalline Si active layer except for the impurity layer. This is a thin film transistor with characteristics.

[Principle and operation of the invention]

Conductive electrodes serving as gate electrodes are provided above and below the polycrystalline Si scraps via thin insulating films (for example, 8102)', forming a common f-). In addition, an impurity layer to become a source/drain is formed as a low resistance region in a part of the active layer using techniques such as ion implantation and annealing. In a transistor configured in this way, the vicinity of the interface between the front side and the back side of the polycrystalline Si active layer can be used simultaneously as a channel, and when a transistor is created within the same area, the gm of the conventional 2#r is reduced. Obtainable. , and a buried channel (
The same effect can be obtained by a structure in which n is near the surface and fcp type inside.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a cross-sectional view of the structure of a thin film transistor according to a first embodiment of the present invention. In the figure, the same numbers or symbols as those in FIG. 2 represent the same components. Although the present invention will be explained using seven channel transistors for convenience, the same applies to the case of constructing a P-channel transistor. In this embodiment, the glass substrate 11
(glass, quartz, etc.) through an insulating film 12.
A four-conductor layer 15' is provided. The thickness of the insulating film 12 is not particularly limited, and is formed to an appropriate thickness using a low pressure CVD manufacturing apparatus or the like. Further, this insulating film 12 is provided to prevent Na-based substances contained in the glass from diffusing into the polycrystalline S1 when depositing the polycrystalline St.
This is not necessarily necessary for obtaining the constituent sounds of the present invention.

The polycrystalline St conductive layer 15' can be obtained as a low-resistance film by depositing undoped polycrystalline Sl by low-pressure CVD or the like, and then doping with impurities such as F) P or As by ion implantation or the like. It will be done. The above-mentioned lead 'f!' obtained in this way! & layer 15', a thin insulating film (e.g.
5102) Wear 12' by several hundred to several thousand X. and,
Further, polycrystalline SI is deposited thereon (by low pressure CVD method, etc.), doped with an impurity such as gelon so that the threshold voltage becomes an appropriate value, and then appropriately annealed to form a polycrystalline S1 active layer 13. form. This active layer 13 contains H2, F2
etc. may be doped. A part of this layer is doped with a high concentration of impurity (P or Aa) to form n'' impurity layers 14, 14' which become low resistance sources and drains.
form. Then, a thin insulating film 12' made of 5IO2 or the like is provided thereon to have the same thickness as the thin insulating film 12. The thicknesses of the insulating films 12 and 12' may not necessarily be the same or thick. Next, a conductive layer 15 of polycrystalline Si is formed on this insulating film 12' by the method described above. After this, ・A mother tsusipation film (SIO2, etc.) is applied to the entire surface, and the source ・
After opening only the drain portion, Al (which may also be W, Cr, etc.) is evaporated (by electron beam evaporation, etc.) to take out the electrode 16. At this time, the field region (polycrystalline Si
Polycrystalline S1 conductive layer 1 on (region where no conductive layer 13 is provided)
5 and 15' and the At (, W, Cr, etc.) of the electrode 16 are brought into ohmic contact with each other and taken out to the outside as a common gate electrode.

In this embodiment, the gate electrodes 15 and 15' are made of polycrystalline S.
Although an example in which the conductive layer is formed using a conductive layer of t is given above, it may be constructed using other conductive electrodes. For example, W, W silicide, Mo, Mo silicide, At, AZSI,
Components include C0812, Cr, Au, etc.

In the transistor configured in this manner, the gate electrodes 15 and 15' are provided above and below the active layer 13;
One channel can be formed in the vicinity of the upper and lower interfaces of the active layer 13. Furthermore, the flow of electrons through these channels is controlled by controlling the charges in the inversion layers of the upper channel and the lower channel, respectively, using bias voltages applied to the gate electrodes 15 and 15'. That is, when the r-to voltage is QV, both channels are in a cut-off state, and when a bias voltage higher than the threshold voltage of 77 is applied to the gate, both channels are in an on-state.
A current flows between the drain and source. In this case, since two channels are formed, a transistor with the same width can obtain 9 m (ie, drain current), which is twice as much as in the conventional case. Furthermore, if an n-type impurity is introduced near the interface with the insulating film to make the inside of the active layer kp type, a buried channel is formed and μe becomes higher, so that a higher gm can be obtained. In this case as well, the conventional value (
'JjIi channel transistor value)
Needless to say, you can get twice the distance of 9m.

The above is a transistor in which an n-channel is formed in a p-type active layer, but in a different region (a different region on the glass substrate 11) with a similar structure (the type of impurity is By configuring a p-channel transistor (which is the opposite), it becomes possible to configure a CMOS inverter that is completely insulated and has twice the current supply capacity of the conventional one.

With the thin film transistor of the present invention, the GME can be improved twice as much as the conventional one, so if it is integrated into an IC and configured as a dry transistor, high-speed driving becomes possible. Moreover, since the channel width can be designed to be the same size as a conventional transistor, the area of the polycrystalline Si active layer does not increase, and when forming a driver etc., there will be no increase in dale particles or defects. Does not cause yield loss. Furthermore, since a high gm can be obtained by employing the TPT, W/L and t of the transistor can be reduced, and the aperture ratio of the display cell can be increased. If W can be made smaller, the area where trap levels and defects can occur in the polycrystalline Si active layer will be reduced due to the reduction in the occupied area, and an improvement in yield can be expected. In particular, in a drive device such as an EL, the TI''T is configured with two transistors, so the effect obtained is remarkable.

Furthermore, in the configuration of the present invention, since the substrate does not float, the kink phenomenon often seen in SOI structures is also suppressed.

〔Effect of the invention〕

As explained above, according to the present invention, if the drain current ID is compared with the same value, the Im input can be improved to twice that of the conventional one. It becomes possible to increase the capacity of the device. Furthermore, since /L of the TPT itself can be reduced, the aperture ratio of the display cell can be increased. As a result, L.C.
It is possible to improve the contrast of display devices such as Also, T.P.
Since the W of T can be made small, the area of the polycrystalline Si layer is reduced, and an improvement in yield can be expected.

[Brief explanation of drawings]

FIG. 1 is a structural sectional view showing a first embodiment of a thin film transistor according to the present invention, and FIG. 2 is a structural sectional view of a conventional thin film transistor. 11... Glass-like substrate, 12.12'... Insulating film,
13... Polycrystalline Si active layer, 14.14'... Layer impurity layer, 15... Polycrystalline Si conductive layer, 16... At. Figure 2

Claims (1)

[Claims] (1) Polycrystalline Si formed by providing a first conductive electrode on a glass substrate with an insulating film interposed therebetween, and partially forming a source/drain impurity layer thereon with a first insulating thin film thereon. An active layer is provided, and a second insulating thin film having a thickness similar to that of the first insulating thin film is provided thereon, and a second conductive electrode is provided via the second insulating thin film, A thin film transistor characterized in that the first and second conductive electrodes are used as a common gate, and a channel is formed in a polycrystalline Si active layer excluding the impurity layer.