JPS6017964A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the area of an MOS transistor by half and to largely decrease a current leakage by forming a gate through an insulating film around a pole or conical unit of semiconductor between two sources and drains. CONSTITUTION:The surfaces of an Mo strip film 5 having a width of a gate length and an insulator 4 are finished substantially in the same height, a gate dielectric insulating film SiO2 of semiconductor MOS is accumulated on Mo, and polycrystalline Si 10 is crystallized in large grains. Then, a gate SiO2 film 14 is formed, semiconductor islands of source, channel, drain are etched, and the film 5 of lower part is exposed. Then, when an Mo film 5' which contains oxygen is accumulated and annealed, a semiconductor Si film 10 contacted with the Mo at the side of the film 10 is varied to an SiO2 film 14, and an MOS structure is formed at the side. Then, the Mo except the gate is etched to expose source and drains 15, 16, P<+> ions 11 are implanted, and converted into N<+> type. When an acceptor impurity is previously doped with a semiconductor substrate, thereby forming electrodes 6, 7, 8 of source, drain and gate to form an n-channel transistor.

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The invention relates to a metal-difill film-semiconductor (M
Regarding OS) type transistors, especially MOS) with high Kgm.
Regarding the transistor.

[Prior art and seven problems]

Metal-oxide-semiconductor structure transistors are widely used as basic elements of LSIs because of their high input impedance. The structure will be explained using the conceptual diagram shown in FIG. - A second conductivity type portion 2.3 is provided at two separate locations on the surface of the conductivity type semiconductor substrate 1, and an insulating film 4, for example, an oxide or nitride of 8i, is provided on the intermediate surface between the portions 2 and 3. A gate 5, for example, metal, metal silicide, or polycrystalline semiconductor is formed between them, and electrodes 6°7.8 are taken out from the second conductivity type portions 2, 3, that is, the source/drain and the gate 5. In the VD region where the drain current ID is proportional to the source-drain voltage VD of this transistor,
D is simply ID! , μCo(Vo VT) VD . Here, W and L are the channel width and length, respectively.
μ is the carrier mobility, co is the capacitance of the insulator, VG, V
T is the gate voltage and its threshold value. By applying a voltage to the gate, carriers of the second conductivity type are induced on the surface and made into a conductive state, but as described above, the input impedance is high because it is through an insulator. Therefore, the input component is only capacitive. MO with these characteristics
S) This conventional structure has the following problems.

One of them is that MO8) transistors, unlike bipolar transistors, can obtain less current.

In some cases, the conductance fjm is small. In order to increase this yn in the above equation, channel [1] W is set to dog, the channel length is made small, and the gate insulating film is made thin <L, CC.

Make it bigger. As a result of this increase in W, the area occupied by the element increases. Another problem is the surface 9 other than the channel part.
etc., etc.) A current flows through -7t regardless of the pressure. As a result, the difference in current between the OFF state and the ON state becomes smaller.〇 [Object of the Invention] This invention improves the drawbacks of the conventional MO8) transistor mentioned above. It is an object of the present invention to provide a MOS transistor in which a large current can be obtained even with a channel 1, and a magnetic current is not caused to flow in a region (field) outside the channel 1 regardless of the gate voltage.

[Summary of the invention]

The MO8) transistor of the present invention is not formed on a Si substrate, but is an SOI (Si single crystal thin film on an insulator) obtained by recent beam recrystallization technology, microfabrication technology, etc.
etc. That is, in a columnar or cone-shaped semiconductor substrate (a more specific example is a rectangular thin-film semiconductor single crystal plate), separated first and second portions surrounding the columnar or conical body are formed.
This is an MO8) transistor in which a source and a drain are formed in a portion, and a gate is formed between the source and drain, surrounding a column or a pyramid with an insulating film interposed therebetween. In the case of a pyramid, for example, instead of a parallel flat thin film single crystal plate, it is a trapezoidal plate with an angle, a triangular single crystal plate, a circle formed perpendicular to the substrate,
They are pyramidal, circular, and opposed.

〔Effect of the invention〕

For example, - a second conductivity type region is formed on two opposite sides of a set of rectangular thin film semiconductor single crystal plates of a conductivity type, and these isolated two
A gate insulating film and a gate material are formed in the middle of the region, surrounding all sides of the single crystal plate. The channel length of this transistor is equal to the distance between the two second conductivity type regions,
The channel @'Jw is the channel 11 of a conventional two-dimensional MO8) transistor with a rectangular [1] 21 sound (front channel and back channel) and twice the thickness of the semiconductor thin film added, although slightly. It will be twice as much. As a result, the transconductance naturally becomes 2 series. The second advantage of the transistor of the present invention is that there is no field section. That is, a gate exists on the entire semiconductor surface from the source to the drain with a dielectric insulating film interposed therebetween.

Therefore, there is no leakage current that cannot be controlled by the gate.

[Implementation sequence of the invention]

The manufacturing process of one embodiment of the semiconductor device of the present invention is shown in FIG.
) to (d) Cross-sectional views perpendicular to the Ic channel, showing the third
Figures (al to (d) are cross-sectional views in the channel direction. An MO band-shaped film 5 with a width equal to the gate length is deposited on the insulator 4, and its periphery is flattened. Approximately the same surface
Finish to height. Next, it is deposited on the #' 4-body insulating film 5tO2O of the semiconductor MOB.
), Next, 600 OA of polycrystalline 5t10 is deposited, and subjected to electron beam or V-zer beam annealing to form a dog-grain-sized polycrystal or single crystal (FIGS. 2 and 3 (h)).

Next, gate 5L is formed by oxidation or deposition for the front side channel.
Forms O2I4. Next, by using 111E etc., the source
Create a channel/drain semiconductor island by etching. This allows the lower M.

5 is exposed. Next, MO5' containing oxygen is deposited and annealed at high temperature. At this time, oxygen in the MO diffuses to the interface side, and the semiconductor 5il that is in contact with the MO on the side surface of the plate-shaped semiconductor 10
Since Q is changed to 5in214, an MO8 structure is formed on the side surface. Next, the MO other than the gate portion is etched to expose the source/drain portions 15 and 16. P+ (
Phosphorus) 11 is ion-implanted at high acceleration energy, and the source/drain portion is unified from the front surface to the back surface (FIGS. 2 and 3 (C)). By doping the semiconductor substrate with acceptor impurities in advance, electric current [6, 7, 8] is removed from the source, drain, and gate, and the n-channel transistor l/
i'A is created (Figures 2 and 3 (d)). FIG. 4 is a perspective view of the exploded semiconductor device. When we formed and compared n-channel transistors with the same source, channel, and drain shapes and a gate only on the top, we found that with the same drain voltage and gate voltage, the transistor of the present invention has 2
．． A drain current of 0 times was obtained. This means that the transconductance is 2 fPt, which is an effect of the presence of channels on the front and back sides. VD of the above transistor (channel length 5 μm) of the present invention = 5V, ■o
The leakage current at =-5V was less than 10-+4A/μm. - 10"-12 Alpm under the same conditions for the same shape 11 channel transistor with gate only on the blade surface
It was huge. This is thought to be because fixed positive charges remain at the interface between the side and back surfaces of the plate-shaped semiconductor and the dielectric insulating film in contact therewith, inducing carriers on the semiconductor surface and contributing to leakage current.

Although an example has been shown in which the channel part and the source/drain are of different conductivity types, if the channel part is also of the same conductivity type as the source/drain (n-), it is used as a load transistor of an E/D inverter. In the case of the present invention, it is easy to see that a width of 1 is sufficient to obtain the same conductivity.

Therefore, it can be said that the present invention provides an element with a new structure in which the area of the conventional Δ[081-transistor is halved and current leakage is greatly reduced.

Although a rectangular semiconductor board has been described, a trapezoidal or triangular semiconductor board may also be used. My father, using recent beam annealing technology and micro-measuring technology, we can produce 1 cylinder and 5th pyramid with a height of μm.
Figure) 9 It is possible to easily obtain a conical semiconductor. It is also possible to form a gate insulating film and a gate by winding the side surfaces of such a prism, and to sandwich this and form the source and drain above and below. Such an A1O8) transistor can improve the degree of integration when devices are three-dimensionally integrated, or can be used as a gate of an upper and lower two-layer device.

Although we have explained the method of configuring the oxide film and MO gate around the semiconductor in a self-aligned manner using a λ(0 gate), it can also be manufactured without self-alignment.In that case, the oxide film on the side surface of the semiconductor board Although the thickness may be different from the oxide film thickness on the upper surface, this does not impair the effects of the present invention described above.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a conventional +WOS)- transistor, and FIG. 2 is a perspective view of a semiconductor device according to the present invention, viewed from a direction perpendicular to the channel. A front view, FIG. 3 is a sectional view showing the same manufacturing process, and FIG. 4 is a perspective view of an embodiment of the present invention.
FIG. 5 is a perspective view of another embodiment of the invention. 4.14... Gate insulating film, 5.5'... Molybdenum gate electrode, 10. Polycrystalline silicon layer, 15.16 Source/drain part.

Claims (1)

[Claims] First and second portions of a second conductivity type are formed spaced apart in the axial direction of a columnar or conical semiconductor substrate of a first conductivity type to constitute a source and a drain, and the first and second portions separated from each other are formed to constitute a source and a drain. An insulating layer 1ili surrounds the side surface of the base in the middle of
A semiconductor device in which a conductive gate is formed through a tt body film to form a metal-dielectric film-semiconductor structure.