JPS6314386B2 - - Google Patents
Info
- Publication number
- JPS6314386B2 JPS6314386B2 JP55096345A JP9634580A JPS6314386B2 JP S6314386 B2 JPS6314386 B2 JP S6314386B2 JP 55096345 A JP55096345 A JP 55096345A JP 9634580 A JP9634580 A JP 9634580A JP S6314386 B2 JPS6314386 B2 JP S6314386B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- input
- page
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 10
- 230000005540 biological transmission Effects 0.000 description 5
- 239000000872 buffer Substances 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000013479 data entry Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Image Input (AREA)
- Image Processing (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9634580A JPS5720841A (en) | 1980-07-15 | 1980-07-15 | Memory controlling circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9634580A JPS5720841A (en) | 1980-07-15 | 1980-07-15 | Memory controlling circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5720841A JPS5720841A (en) | 1982-02-03 |
JPS6314386B2 true JPS6314386B2 (zh) | 1988-03-30 |
Family
ID=14162412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9634580A Granted JPS5720841A (en) | 1980-07-15 | 1980-07-15 | Memory controlling circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5720841A (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603081A (ja) * | 1983-06-18 | 1985-01-09 | Dainippon Printing Co Ltd | Icカ−ド |
JPS60140421A (ja) * | 1983-12-28 | 1985-07-25 | Hitachi Ltd | 出力制御装置 |
JPS61851A (ja) * | 1984-06-14 | 1986-01-06 | Nec Corp | ダイレクトメモリアクセス回路のデ−タチエ−ン方式 |
JPS6265172A (ja) * | 1985-09-17 | 1987-03-24 | Nippon Telegr & Teleph Corp <Ntt> | デ−タ符号・復号化制御方式 |
JP2919841B2 (ja) * | 1988-11-16 | 1999-07-19 | ローム株式会社 | データ処理装置のテスト方法 |
KR0175732B1 (ko) * | 1995-08-09 | 1999-04-01 | 조백제 | 다채널 오디오 디코더의 역정규화장치 및 그의 역정규화방법 |
-
1980
- 1980-07-15 JP JP9634580A patent/JPS5720841A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5720841A (en) | 1982-02-03 |
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