JPS628596Y2 - - Google Patents
Info
- Publication number
- JPS628596Y2 JPS628596Y2 JP6556183U JP6556183U JPS628596Y2 JP S628596 Y2 JPS628596 Y2 JP S628596Y2 JP 6556183 U JP6556183 U JP 6556183U JP 6556183 U JP6556183 U JP 6556183U JP S628596 Y2 JPS628596 Y2 JP S628596Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- shift register
- output
- clock pulse
- synchronization signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001360 synchronised effect Effects 0.000 claims description 14
- 230000015654 memory Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6556183U JPS591242U (ja) | 1983-04-30 | 1983-04-30 | 分周回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6556183U JPS591242U (ja) | 1983-04-30 | 1983-04-30 | 分周回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS591242U JPS591242U (ja) | 1984-01-06 |
| JPS628596Y2 true JPS628596Y2 (enExample) | 1987-02-27 |
Family
ID=30195762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6556183U Granted JPS591242U (ja) | 1983-04-30 | 1983-04-30 | 分周回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS591242U (enExample) |
-
1983
- 1983-04-30 JP JP6556183U patent/JPS591242U/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS591242U (ja) | 1984-01-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6243568B2 (enExample) | ||
| JPS6143015A (ja) | デ−タ遅延記憶回路 | |
| US5287296A (en) | Clock generators having programmable fractional frequency division | |
| US6389095B1 (en) | Divide-by-three circuit | |
| JPH02301269A (ja) | キー信号遅延装置 | |
| JP3891877B2 (ja) | クロック信号発生装置、通信装置および半導体装置 | |
| KR19990017292A (ko) | 가변 비정수배 분주회로 | |
| EP1678827B1 (en) | Method and apparatus for generating a distortionless pulse width modulated waveform | |
| JP3536426B2 (ja) | 波形発生器 | |
| JPS5880723A (ja) | クロツク信号発生装置 | |
| JP3003328B2 (ja) | クロック信号回路 | |
| JPS6019689B2 (ja) | 分周装置 | |
| JPS58181346A (ja) | デ−タ多重化回路 | |
| JPS61140221A (ja) | タイミング発生回路 | |
| US10742219B1 (en) | Programmable modular frequency divider | |
| US20060066413A1 (en) | Oscillator | |
| JP2752635B2 (ja) | マルチプレクス用大規模集積回路 | |
| JPH04117816A (ja) | 可変分周装置 | |
| JPH071885B2 (ja) | ワ−ド同期器 | |
| JPS591242U (ja) | 分周回路 | |
| JP2000349834A (ja) | 非同期式直列情報受信装置および非同期式直列情報送信装置 | |
| JP2594571B2 (ja) | 遅延回路 | |
| JPS581002Y2 (ja) | 通信制御装置 | |
| JPH1168555A (ja) | クロック分周切替回路 | |
| JPH0522121A (ja) | 分周器 |