JPS6252454B2 - - Google Patents
Info
- Publication number
- JPS6252454B2 JPS6252454B2 JP54087025A JP8702579A JPS6252454B2 JP S6252454 B2 JPS6252454 B2 JP S6252454B2 JP 54087025 A JP54087025 A JP 54087025A JP 8702579 A JP8702579 A JP 8702579A JP S6252454 B2 JPS6252454 B2 JP S6252454B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- alignment
- buried
- unevenness
- sides
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8702579A JPS5612745A (en) | 1979-07-10 | 1979-07-10 | Production of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8702579A JPS5612745A (en) | 1979-07-10 | 1979-07-10 | Production of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5612745A JPS5612745A (en) | 1981-02-07 |
JPS6252454B2 true JPS6252454B2 (enrdf_load_stackoverflow) | 1987-11-05 |
Family
ID=13903409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8702579A Granted JPS5612745A (en) | 1979-07-10 | 1979-07-10 | Production of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5612745A (enrdf_load_stackoverflow) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5785227A (en) * | 1980-11-17 | 1982-05-27 | Toshiba Corp | Manufacture of semiconductor device |
JPS6336033U (enrdf_load_stackoverflow) * | 1986-08-22 | 1988-03-08 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5434770A (en) * | 1977-08-24 | 1979-03-14 | Nec Corp | Semiconductor substrate and manufacture of semiconductor using it |
-
1979
- 1979-07-10 JP JP8702579A patent/JPS5612745A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5612745A (en) | 1981-02-07 |
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