JPS6249736B2 - - Google Patents

Info

Publication number
JPS6249736B2
JPS6249736B2 JP56191462A JP19146281A JPS6249736B2 JP S6249736 B2 JPS6249736 B2 JP S6249736B2 JP 56191462 A JP56191462 A JP 56191462A JP 19146281 A JP19146281 A JP 19146281A JP S6249736 B2 JPS6249736 B2 JP S6249736B2
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
oxide film
silicon
layer
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56191462A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5892240A (ja
Inventor
Seiji Ueda
Ichizo Kamei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP56191462A priority Critical patent/JPS5892240A/ja
Publication of JPS5892240A publication Critical patent/JPS5892240A/ja
Publication of JPS6249736B2 publication Critical patent/JPS6249736B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
JP56191462A 1981-11-27 1981-11-27 半導体装置の製造方法 Granted JPS5892240A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56191462A JPS5892240A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56191462A JPS5892240A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5892240A JPS5892240A (ja) 1983-06-01
JPS6249736B2 true JPS6249736B2 (enrdf_load_stackoverflow) 1987-10-21

Family

ID=16275041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56191462A Granted JPS5892240A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5892240A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2504144B2 (ja) * 1988-11-16 1996-06-05 カシオ計算機株式会社 サ―マルヘッドおよびその製造方法

Also Published As

Publication number Publication date
JPS5892240A (ja) 1983-06-01

Similar Documents

Publication Publication Date Title
US4125426A (en) Method of manufacturing semiconductor device
JPS6249736B2 (enrdf_load_stackoverflow)
JPH0313744B2 (enrdf_load_stackoverflow)
JPS6029222B2 (ja) 固体電子装置の製造方法
JPS6347274B2 (enrdf_load_stackoverflow)
JPS6111468B2 (enrdf_load_stackoverflow)
JPS622654A (ja) 半導体装置およびその製造方法
JPS6320383B2 (enrdf_load_stackoverflow)
JPS6038872B2 (ja) 半導体装置の製造方法
JPS6151941A (ja) 電極・配線膜の製造方法
JPS59232443A (ja) 半導体装置の製造方法
JP2790514B2 (ja) 半導体装置の製造方法
JPS5952550B2 (ja) 半導体装置の製造方法
JPS594013A (ja) 半導体装置の製造方法
JPS60217645A (ja) 半導体装置の製造方法
JPH0117256B2 (enrdf_load_stackoverflow)
JPS6125217B2 (enrdf_load_stackoverflow)
JPS6131616B2 (enrdf_load_stackoverflow)
JPS6161546B2 (enrdf_load_stackoverflow)
JPH028451B2 (enrdf_load_stackoverflow)
JPH0713958B2 (ja) 半導体装置の製造方法
JPS59151447A (ja) 半導体装置の製造方法
JPS6137781B2 (enrdf_load_stackoverflow)
JPS59215746A (ja) 半導体装置の製造方法
JPS59193061A (ja) 半導体装置