JPS6239825B2 - - Google Patents
Info
- Publication number
- JPS6239825B2 JPS6239825B2 JP56176799A JP17679981A JPS6239825B2 JP S6239825 B2 JPS6239825 B2 JP S6239825B2 JP 56176799 A JP56176799 A JP 56176799A JP 17679981 A JP17679981 A JP 17679981A JP S6239825 B2 JPS6239825 B2 JP S6239825B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor
- heat dissipation
- external lead
- ceramic substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W95/00—Packaging processes not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Laser Beam Processing (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56176799A JPS5878443A (ja) | 1981-11-04 | 1981-11-04 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56176799A JPS5878443A (ja) | 1981-11-04 | 1981-11-04 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5878443A JPS5878443A (ja) | 1983-05-12 |
| JPS6239825B2 true JPS6239825B2 (https=) | 1987-08-25 |
Family
ID=16020039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56176799A Granted JPS5878443A (ja) | 1981-11-04 | 1981-11-04 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5878443A (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6081843A (ja) * | 1983-10-12 | 1985-05-09 | Fujitsu Ltd | マイクロ波筐体の製造方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51114874A (en) * | 1975-04-02 | 1976-10-08 | Hitachi Ltd | Semiconductor device formation method |
| JPS577835A (en) * | 1980-06-19 | 1982-01-16 | Hitachi Cable Ltd | Manufacture of base material for optical fiber |
-
1981
- 1981-11-04 JP JP56176799A patent/JPS5878443A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5878443A (ja) | 1983-05-12 |
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