JPS6235143B2 - - Google Patents
Info
- Publication number
- JPS6235143B2 JPS6235143B2 JP53129255A JP12925578A JPS6235143B2 JP S6235143 B2 JPS6235143 B2 JP S6235143B2 JP 53129255 A JP53129255 A JP 53129255A JP 12925578 A JP12925578 A JP 12925578A JP S6235143 B2 JPS6235143 B2 JP S6235143B2
- Authority
- JP
- Japan
- Prior art keywords
- flip
- flop
- signal
- circuit
- interrupt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000630 rising effect Effects 0.000 claims description 16
- 230000010365 information processing Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 7
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 7
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12925578A JPS5556260A (en) | 1978-10-20 | 1978-10-20 | Information processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12925578A JPS5556260A (en) | 1978-10-20 | 1978-10-20 | Information processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5556260A JPS5556260A (en) | 1980-04-24 |
| JPS6235143B2 true JPS6235143B2 (de) | 1987-07-30 |
Family
ID=15005040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12925578A Granted JPS5556260A (en) | 1978-10-20 | 1978-10-20 | Information processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5556260A (de) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57185044U (de) * | 1981-05-12 | 1982-11-24 | ||
| JPS5870336A (ja) * | 1981-10-21 | 1983-04-26 | Nec Corp | 情報処理装置 |
| JPS61150062A (ja) * | 1984-12-24 | 1986-07-08 | Matsushita Electric Ind Co Ltd | 割込み制御回路 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5125946A (de) * | 1974-08-27 | 1976-03-03 | Kawasaki Heavy Ind Ltd |
-
1978
- 1978-10-20 JP JP12925578A patent/JPS5556260A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5125946A (de) * | 1974-08-27 | 1976-03-03 | Kawasaki Heavy Ind Ltd |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5556260A (en) | 1980-04-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6235143B2 (de) | ||
| US4616335A (en) | Apparatus for suspending a system clock when an initial error occurs | |
| EP0130293B1 (de) | Kippschaltung bestehend aus einer Anordnung logischer Tore | |
| JPS6167148A (ja) | マイクロコンピユ−タ | |
| JPS6215664A (ja) | 論理シミユレ−タ | |
| JPH0478960A (ja) | 論理シミュレータ単位時間設定方式 | |
| JPS5934188Y2 (ja) | 信号入力回路 | |
| JPH0778076A (ja) | プログラム自動生成装置 | |
| JPS61249142A (ja) | 割り込み回路 | |
| GB1315673A (en) | Digital computer installations | |
| JPH01123329A (ja) | 割込み回路 | |
| JPH01243141A (ja) | 情報処理装置 | |
| JPS55116151A (en) | Automatic generation system for stepwise advance number of clocks | |
| JPS60173484A (ja) | 論理シミユレ−シヨン方式 | |
| JPS5835626A (ja) | バス争奪制御方式 | |
| JPH0343812A (ja) | Ｌｓｉ内部フリップフロップ初期値設定方式 | |
| JPS63262575A (ja) | デイジタル信号処理用集積回路 | |
| JPH0222414B2 (de) | ||
| JPS61289749A (ja) | シリアルデ−タ転送装置 | |
| JPH02124635A (ja) | カウンタ制御回路 | |
| JPS5562373A (en) | Logic circuit test unit | |
| JPS60209851A (ja) | プログラム・シ−ケンス・ストツプ方式 | |
| JPH02217935A (ja) | デバッグ用割込み発生回路 | |
| JPH01222343A (ja) | トレース方法 | |
| JPS6278630A (ja) | 情報処理装置 |