JPS6227414B2 - - Google Patents

Info

Publication number
JPS6227414B2
JPS6227414B2 JP56140495A JP14049581A JPS6227414B2 JP S6227414 B2 JPS6227414 B2 JP S6227414B2 JP 56140495 A JP56140495 A JP 56140495A JP 14049581 A JP14049581 A JP 14049581A JP S6227414 B2 JPS6227414 B2 JP S6227414B2
Authority
JP
Japan
Prior art keywords
read
memory
segment
word
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56140495A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5843038A (ja
Inventor
Akinori Horikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14049581A priority Critical patent/JPS5843038A/ja
Publication of JPS5843038A publication Critical patent/JPS5843038A/ja
Publication of JPS6227414B2 publication Critical patent/JPS6227414B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP14049581A 1981-09-07 1981-09-07 制御記憶装置 Granted JPS5843038A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14049581A JPS5843038A (ja) 1981-09-07 1981-09-07 制御記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14049581A JPS5843038A (ja) 1981-09-07 1981-09-07 制御記憶装置

Publications (2)

Publication Number Publication Date
JPS5843038A JPS5843038A (ja) 1983-03-12
JPS6227414B2 true JPS6227414B2 (enrdf_load_stackoverflow) 1987-06-15

Family

ID=15269949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14049581A Granted JPS5843038A (ja) 1981-09-07 1981-09-07 制御記憶装置

Country Status (1)

Country Link
JP (1) JPS5843038A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6015968B2 (ja) * 1975-04-17 1985-04-23 日本電気株式会社 制御記憶装置
JPS6049334B2 (ja) * 1977-10-19 1985-11-01 日本電気株式会社 制御記憶装置

Also Published As

Publication number Publication date
JPS5843038A (ja) 1983-03-12

Similar Documents

Publication Publication Date Title
JPH0411957B2 (enrdf_load_stackoverflow)
US4805092A (en) Electronic circuit for extending the addressing capacity of a processor
JPS6227414B2 (enrdf_load_stackoverflow)
JPH0430399A (ja) 半導体記憶システム
JPS6049334B2 (ja) 制御記憶装置
JPH0792734B2 (ja) メモリ装置
JPS6045994A (ja) Ｐｒｏｍによる情報記憶方法
JPS588357A (ja) 制御記憶装置
JP4141042B2 (ja) 不揮発性メモリの書き込み回路
JPS61155815A (ja) 記録計
JPS6357819B2 (enrdf_load_stackoverflow)
SU964731A1 (ru) Буферное запоминающее устройство
KR950010594Y1 (ko) 반도체 기억시스템
JPH03191450A (ja) メモリーカードの不良チップ代替え回路
JPS586970B2 (ja) Ｒｏｍアドレスのシ−ケンス制御方式
JPS61120260A (ja) 順次デ−タ記憶回路のアクセス装置
JP2906449B2 (ja) ビットマップディスプレイ制御装置
KR900003148B1 (ko) 일시 화상 기억형 모니터 인터페이스
JPS6232818B2 (enrdf_load_stackoverflow)
JPS58181152A (ja) デ−タ処理装置のデバグ方式
JPS60117353A (ja) 記憶装置における交代メモリ制御方法
JPH0217549A (ja) データ処理装置
JPS60221843A (ja) 判定装置
JPH1139222A (ja) マイクロコンピュータ
JPH04171549A (ja) メモリシステムの高速読出し方法