JPS62232057A - 擬似ｄｍａ方式 - Google Patents

擬似ｄｍａ方式

Info

Publication number
JPS62232057A
JPS62232057A JP61074352A JP7435286A JPS62232057A JP S62232057 A JPS62232057 A JP S62232057A JP 61074352 A JP61074352 A JP 61074352A JP 7435286 A JP7435286 A JP 7435286A JP S62232057 A JPS62232057 A JP S62232057A
Authority
JP
Japan
Prior art keywords
line
circuit
data
lsi
common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61074352A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0471224B2 (enrdf_load_stackoverflow
Inventor
Makoto Ebihara
海老原　真
Tsutomu Komatsubara
小松原　勉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP61074352A priority Critical patent/JPS62232057A/ja
Publication of JPS62232057A publication Critical patent/JPS62232057A/ja
Publication of JPH0471224B2 publication Critical patent/JPH0471224B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
JP61074352A 1986-04-02 1986-04-02 擬似ｄｍａ方式 Granted JPS62232057A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61074352A JPS62232057A (ja) 1986-04-02 1986-04-02 擬似ｄｍａ方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61074352A JPS62232057A (ja) 1986-04-02 1986-04-02 擬似ｄｍａ方式

Publications (2)

Publication Number Publication Date
JPS62232057A true JPS62232057A (ja) 1987-10-12
JPH0471224B2 JPH0471224B2 (enrdf_load_stackoverflow) 1992-11-13

Family

ID=13544645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61074352A Granted JPS62232057A (ja) 1986-04-02 1986-04-02 擬似ｄｍａ方式

Country Status (1)

Country Link
JP (1) JPS62232057A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0241542A (ja) * 1988-08-02 1990-02-09 Fujitsu Ltd 通信プロセッサのバス異常検出処理方式
JPH03265334A (ja) * 1990-03-15 1991-11-26 Hitachi Ltd マルチチャネル通信処理装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0241542A (ja) * 1988-08-02 1990-02-09 Fujitsu Ltd 通信プロセッサのバス異常検出処理方式
JPH03265334A (ja) * 1990-03-15 1991-11-26 Hitachi Ltd マルチチャネル通信処理装置

Also Published As

Publication number Publication date
JPH0471224B2 (enrdf_load_stackoverflow) 1992-11-13

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