JPS62216348A - 半導体素子用パツケ−ジ及びその製造法 - Google Patents

半導体素子用パツケ−ジ及びその製造法

Info

Publication number
JPS62216348A
JPS62216348A JP6021886A JP6021886A JPS62216348A JP S62216348 A JPS62216348 A JP S62216348A JP 6021886 A JP6021886 A JP 6021886A JP 6021886 A JP6021886 A JP 6021886A JP S62216348 A JPS62216348 A JP S62216348A
Authority
JP
Japan
Prior art keywords
layer
metallized layer
metal
electrode
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6021886A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0466386B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Takeshi Suzuki
剛 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
Original Assignee
NGK Insulators Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd filed Critical NGK Insulators Ltd
Priority to JP6021886A priority Critical patent/JPS62216348A/ja
Publication of JPS62216348A publication Critical patent/JPS62216348A/ja
Publication of JPH0466386B2 publication Critical patent/JPH0466386B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP6021886A 1986-03-18 1986-03-18 半導体素子用パツケ−ジ及びその製造法 Granted JPS62216348A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6021886A JPS62216348A (ja) 1986-03-18 1986-03-18 半導体素子用パツケ−ジ及びその製造法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6021886A JPS62216348A (ja) 1986-03-18 1986-03-18 半導体素子用パツケ−ジ及びその製造法

Publications (2)

Publication Number Publication Date
JPS62216348A true JPS62216348A (ja) 1987-09-22
JPH0466386B2 JPH0466386B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-10-23

Family

ID=13135803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6021886A Granted JPS62216348A (ja) 1986-03-18 1986-03-18 半導体素子用パツケ−ジ及びその製造法

Country Status (1)

Country Link
JP (1) JPS62216348A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPH0466386B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-10-23

Similar Documents

Publication Publication Date Title
US4336551A (en) Thick-film printed circuit board and method for producing the same
US4697204A (en) Leadless chip carrier and process for fabrication of same
JPS5832785B2 (ja) 電子部品容器
JP3426988B2 (ja) 多数個取り配線基板
JPS5836500B2 (ja) Ic用セラミック基板の製造法
JPS62216348A (ja) 半導体素子用パツケ−ジ及びその製造法
JP2788656B2 (ja) 集積回路用パッケージの製造方法
JP2000165003A (ja) 多数個取り配線基板
JPS6016749B2 (ja) 集積回路用パツケ−ジ
EP0100727B1 (en) Semiconductor device comprising a ceramic base
JPS63283051A (ja) 混成集積回路装置用基板
JPS595977Y2 (ja) 集積回路の塔載装置
JPH06152114A (ja) 電気回路配線基板及びその製造方法並びに電気回路装置
JPH0558678B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP2698517B2 (ja) バンプ付基板
JPH06151231A (ja) 電気部品
JPH0345900B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP2743524B2 (ja) 混成集積回路装置
JP2000151037A (ja) 多数個取り配線基板
JPH0365034B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS6316645A (ja) 半導体素子収納用パツケ−ジの製造法
JPS6235553A (ja) 半導体搭載装置の製造方法
JPH02102594A (ja) 混成集積回路基板
JPH0459778B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5958848A (ja) セラミツク配線基板の製造方法

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees